Verilog multiplier accumulatorJobs

Verilog project FSM Verilog project FSM Verilog project FSM

I'm in need of a Verilog expert proficient with Quartus Prime Toolchain. Key Requirements: - Professional with Verilog: Need someone experienced in designing digital circuits and implementing specific functionalities using Verilog. - Proficiency with Quartus Prime: Familiarity with the Quartus Prime Toolchain is a must. I need to design, simulate, implement and test a digital circuit using the Quartus Prime toolchain as per the specifications I will provide and demonstrate the workflow when using the Verilog HDL to construct a design for a physical Field Programmable Gate Array (FPGA) target. Please apply if you have the required expertise. No teams or companies please.

...skilled developer to create a mobile app designed for performing a mathematical magic trick. The app will involve complex calculations and data handling to reverse engineer a sequence of mathematical operations based on user input, ultimately revealing specific playing cards with pre-determined ages and birth years. Key Features: User Input: Users will input a final large number and a chosen multiplier (1-10). Reverse Calculation: The app will perform reverse calculations to derive intermediate values and ultimately the user's birth year. Data Mapping: The app will map calculated results to corresponding birth years, ages, and specific playing cards. Deck Arrangement: The app will indicate the correct position of playing cards in a deck based on calculated results. Error H...

We are looking for an experienced freelancer to create a custom DMA firmware using this simple guide : The guide provides detailed instructions, but I lack the time to complete it myself. The project will be executed on a Squirrel 35t board and should not take more than 3-4 hours for s...complete it myself. The project will be executed on a Squirrel 35t board and should not take more than 3-4 hours for someone proficient. **Tasks:** - Configure and customize firmware based on pcileech-fpga - Use Vivado for development - Emulate TLP and configure the configuration space **Required Skills:** - FPGA design and programming - Experience with Vivado (Xilinx) - DMA firmware development - Verilog/VHDL programming - Debugging and testing embedded systems

I need a straightforward MT4 EA with the following features: Strategy: The EA should open both buy and sell orders whenever a new candle forms. Take Profit (TP): Set TP to 50 pips for both buy and sell orders. Stop Loss (SL): Automatically close any open order when a new candle forms. Special Condition: If TP is reached for both buy and sell orders, the ...Take Profit (TP): Set TP to 50 pips for both buy and sell orders. Stop Loss (SL): Automatically close any open order when a new candle forms. Special Condition: If TP is reached for both buy and sell orders, the EA should wait for the next candle to form before opening new orders. Initial Lot Size: Start with a lot size of 0.01. Martingale: Enable Martingale strategy. Martingale Multiplier: Set the multiplier value t...

I am looking for an experienced Verilog developer who can work on my Verilo HDL project. Design a digital circuit for a fruit sorter based on following specification. Develop the block diagram (consists of datapath and control units) and the ASMD chart. Assume that there is a 1-bit RESET signal to reset the circuit and it is asynchronous and active low. In addition, there is a 1-bit CLOCK as the clock. The circuit will start the operation when a 1-bit input signal START is asserted. A fruit detector provides a 1-bit input FRUIT that becomes 1 for one clock cycle if banana is detected and the FRUIT signal will be 1 for two clock cycles if orange is detected. There are 2 different outputs which are OUT1 and OUT2 that will be 1 for one clock cycle for the type of frui...

...into Verilog and run on FPGA device using HLS Vitis. The existing project has: - Edge detection capabilities - Image segmentation capabilities The primary goal of this project is not to enhance or alter the images, but to convert the existing codebase from C++ to Verilog, utilizing HLS Vitis. With your expertise: - Maintain the integrity of the current functionalities during conversion - Reframe the C++ code to Verilog language ensuring a seamless running on an FPGA device. The successful bidder should have significant experience with Verilog, C++, and HLS Vitis, as well as a good understanding of Image Processing algorithms, especially Edge Detection and Image Segmentation. The final output of the conversion should result in an image file product. The d...

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Greetings, We are assembling a dynamic team and currently seeking 4-5 proficient Electrical Engineers to join us for a long-term collaboration. This opportunity is ideal for individuals with expertise in electronics, power systems, and communication systems. Key Requirements: - Strong command over MATLAB for data analysis, simulation, and modeling. - Proficiency in VHDL and Verilog for hardware description and digital circuit design. - Experience with multisim or similar simulation software for circuit analysis and design verification. This collaboration offers an exciting chance to work on diverse projects spanning electronics, power systems, and communication systems. We are committed to fostering a collaborative environment that encourages innovation and professional growth. ...

The goal of this project is using Vivado tools to enable a hardware implementation on an FPGA board. The key requirement from the FPGA board is high computational speed. Therefore, proficiency in Verilog language is preferred as I intend to implement the NTT algorithm. I am looking for a developer who is experienced with FPGA boards and Vivado tools. The chosen freelancer should also have the ability to maximize computing capabilities of the board for the said implementation.

I need verilog code,testbench and simulation for this duty : Design a vector processing system that performs dot product of two vectors kept in the memory. The length of the vector is given as an input and at each clock cycle one element from each vector is multiplied and added. At the end of the processing a valid signal will be raised along with the result. Elements of the vectors are 8-bit unsigned vectors.

I'm looking for a freelancer to help modify my custom EA for MT4. It's a small project. The primary modification involves integrating an option to automatically add an extra lot after a specified number of consecutive losses. Here's what I'm looking for: Key Points: -Make no changes to the EA settings such as Lot size, martingale, lot multiplier, TP/SL etc. -Objective: Modify the EA to 'add extra lot' size after a specified number of consecutive losses. -Custom Settings: Ability to choose the number of losses and lot size. -Please see the attached image of the EA settings I highlighted for your understanding. Requirements: -MT4 Expertise: Strong MQL4 skills and experience developing custom EAs for MT4. -EA Modification Experience: Prior work modi...

I need a talented RTL designer, proficient in Verilog, to carry out an NTT Implementation project focused on dataflow modeling. Key Requirements: - Expertise in Verilog, with a deep understanding and application of dataflow modeling - Prior experience in RTL design and synthesis - The main goal for this task is to achieve optimization of the design using your Verilog expertise - Attention to detail, punctuality, and efficient communication skills are a must This project offers an opportunity to work with an interesting model and explore optimized NTT implementation. Your contribution to this project will be influential in achieving an optimized design.

Im working on a c++ image processing project , and i need to convert my C++ code to Verilog using HLS vitis , then implement it to run on Ultra96v2 Xilinx FPGA board .

I'm in need of skilled programmers to develop interfaces for my Place and Route EDA flows. The ideal candidate will have experience in the following: - Proficiency in Python and/or C++ - Familiarity with VHDL, Verilog, and SystemVerilog - Experience in file input generation - Strong file parsing capabilities - Ability to manage EDA flows using TCL The interfaces need to be able to handle the entire EDA flow, from file input generation to error reporting. Experience in developing similar interfaces will be a big advantage. Please include relevant work samples in your bid.

...accounts 4) Primary account selection : Should have functionality of changing the primary account in excel , we can have predefined criteria for picking up the primary. Like we put primary in certain cell/line etc. 5) Multiplier : Quantity multiplier should be there basis on primary account and can be in integers/fractions like 1.70 , 5.80, 9.8 etc Quantity multiplier can be in fractions and ability to punch order to nearest quantity multiplier but if fractions should be rounding to less quantity , basically let us suppose if order of NIFTY is 500 and I have given multiplier 1.75 . The trade cant happen for 875 quantity , so it should pick 850 quantity . 6) Copy Trading – (Yes/No) : Flexibility to decide no/yes to take copy trades for child accou...

Stepper motor controller in FPGA which generates pulses according to command. verilog code

I'm looking for a talented developer to create a top-tier, engaging casino game app. This app will feature several traditional casino games including: - Slot machines - Poker - Blackjack - Craps - Multiplier Moreover, this project requires multiplayer functionality — online players should be able to engage with their friends on these games. In terms of aesthetics, the design should be understated with "simple and clean" graphics. It's crucial the interface is user-friendly and gameplay intuitive. Ideal Candidate Should Have: - Extensive experience in multiplayer game development - Familiarity with casino games - Proven track record in UI/UX design - Ability to optimize performance and efficiency - A keen eye for detail to create a clean aesthetic You...

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I'm seeking an experienced trainer for Spyglass tool, with a concentration on Lint and CDC (Clock Domain Crossing). As beginners in Spyglass and proficient in Verilog, we primarily aim to identify and fix coding errors through this training. Ideal Skills and Experience: - Strong knowledge of Lint and CDC in Spyglass tool - Demonstrated experience in coding and debugging in Verilog - Excellent training skills - Ability to create and simplify complex concepts for beginners.

...programmer, who possesses proficiency in both Verilog and Vivado, to construct and operate a user-friendly program for my FPGA board. The selected FPGA board is from the Xilinx Artix-7 family (part: xc7a100tcsg324-1). The program’s main responsibility will be to feature a rudimentary vending machine program with the following specifications: - Two component spaces which will each hold a distinct item. - A simplified interface featuring two push buttons as part of a keypad. - A capable card reader to handle seamless payment processing. - A clear 3 digit display that relays instructions and alerts to the user. An ideal candidate for this project should have extensive experience working with Artix-7 FPGA boards and demonstrate a clear understanding of Verilog and V...

...programmer, who possesses proficiency in both Verilog and Vivado, to construct and operate a user-friendly program for my FPGA board. The selected FPGA board is from the Xilinx Artix-7 family (part: xc7a100tcsg324-1). The program’s main responsibility will be to feature a rudimentary vending machine program with the following specifications: - Two component spaces which will each hold a distinct item. - A simplified interface featuring two push buttons as part of a keypad. - A capable card reader to handle seamless payment processing. - A clear 3 digit display that relays instructions and alerts to the user. An ideal candidate for this project should have extensive experience working with Artix-7 FPGA boards and demonstrate a clear understanding of Verilog and V...

I am in need of a seasoned FPGA programmer, proficient in Verilog and Vivado, who can build and run a program for me on a ZYNQ 7000 FPGA board. Our primary goal is: - To work on a program that performs Homomorphic Encryption Algorithm, by analysing its architecture - You'll need to identify the blocks responsible for addition and multiplication operations, as well as enumerate all IO used for these operations. Ideal candidate should have: - Extensive experience in conveying complex FPGA architectures in an understandable form - Proficiency in using Vivado for hardware simulation

...deposit skins in where there is a set percentage player can match up to 10% of initial coinflip - Jackpot Everyone can bet on the jackpot, the higher the bet you make, you'll get a higher chance of getting the pot. Winner gets the pot. -Crash, "Crash" is a gambling game where players place bets on an increasing multiplier that can "crash" at any random moment. The goal is to cash out before the multiplier crashes to win the bet multiplied by the value of the multiplier at the time of cashing out. I do have a domain as well as hosting for you to connect and check if it works. You will have to set up all backend things. You need to make a Steam API trade bot for people that want to deposit game skins. I also would like for play...

...who can create a custom Expert Advisor for CTrader to automate my Martingale trading strategy. This EA should allow me to manage the following key parameters: - **Initial Trade Size:** This value will determine the starting size of the trades. - **Multiplier Factor:** The EA should incorporate a multiplier, which will increase the trade size for subsequent Martingale trades. - **Distance for Further Positions:** This parameter is crucial for the Martingale strategy as it helps to set the distance between the different positions. - **Multiplier for Distance for Further Positions:** This factor will help in setting the distance between the different positions. - **Take Profit in POINTS:** The ability to set a predefined take profit level in points for open positions,...

I am in need of a talented programmer to assist me in building a casino website. The site will feature two main games: Coinflip and Crash. Key Features: - Coinflip: A simple, yet engaging game where users can bet on a coin toss outcome. - Crash: An exciting game where users bet on a multiplier before it "crashes", similar to popular gambling games. Payment Integration: - I'd like the website to support Credit/Debit cards, Cryptocurrencies, and E-wallets for a seamless user experience. User Account Functionalities: - The website should offer user registration and login options, as well as an account balance tracking feature. Ideal Skills and Experience: - Proficiency in web development, particularly in building interactive and secure gambling websites. - Experie...

I'm seeking a skilled FPGA developer to construct an intermediate-level chessAI project. The AI is expected to run real-time on a Spartan-7 FPGA board, using Vivado and Vitis. Key Project Details: - **Real-time Performance:** The AI should be optimised for real-time operation on the FPGA board. - **Intermediate Complexity:** The chessAI should be capable of intermediate-level game play, providing engaging and challenging performance. - **FPGA Model:** The project is designed for a Spartan-7 FPGA board, hence prior experience with this model is preferable. Key Skill Requirements: - Proficiency in FPGA development, particularly with Vivado and Vitis. - Prior experience in designing chessAI or comparable AI projects. - Expertise in optimising AI models for real-time FPGA implementation...

DEADLINE 21st I need an Object Detection(displays text on screen of object name) & Live Streaming system(records video when switch or button pressed), all to be implemented on a Zybo Z7 board with a pcam 5c camera module. Here are the details: - **Programming Language**: The system needs to be developed using verilog and xlinx tools. - **Standalone or Integrated**: I'm looking for the Object Detection & Live Streaming system to be integrated with zyboz7 and pcam5c. - **Functionality**: The system should perform real-time object detection and identification, as well as record and store live streams for later analysis. Finally report that includes tests/testbenches should be included based on requirements in

I'm looking for a developer to create a system for my Zybo Z7 board that can detect people in real-time through a connected pcam5c camera and display the detection text on the video feed...Video Streaming: The video feed should be streamed in real-time. - Text Overlay: The detection results should be displayed as a text overlay on the video. Skills/Experience Required: - Proficient in Xilinx SDK and Xilinx Vivado. - Strong background in object detection, particularly with people. - Previous experience with video processing and streaming. - Knowledge of FPGA programming and VHDL/Verilog is a plus. Please note that my budget for this project is $60. I'm open to hearing from freelancers who can deliver within this budget. I have worked on single pixel (multipixel zoom.v i...

...defined strategies and provided specific parameters. 2. Inputs: - TP (Take Profit) - SL (Stop Loss) - LOT (Lot Size) - STRATEGY CHOICE (123 Setup for buying/selling by Stormer with Stochastic or using 3 Moving Average) - STOCHASTIC PARAMETERS (Stochastic Indicator Settings) - AVERAGE PARAMETERS (Moving Average Indicator Settings) - PLACE PENDING ORDER OR AT MARKET - AVERAGE PRICE: DISTANCE, MULTIPLIER, MAX LOT AND IN FAVOR OR AGAINST TREND - MAXIMUM DRAWDOWN (Maximum Allowable Cash Loss) 3. Strategies: 3.1 123 Setup Strategy with Stochastic: - Implement the buy/sell strategy based on the 123 pattern, using the stochastic indicator to check overbought or oversold conditions. - Consider provided stochastic parameters as part of the inputs. 3.2 123 Setup Strategy with Averages: ...

...defined strategies and provided specific parameters. 2. Inputs: - TP (Take Profit) - SL (Stop Loss) - LOT (Lot Size) - STRATEGY CHOICE (123 Setup for buying/selling by Stormer with Stochastic or using 3 Moving Average) - STOCHASTIC PARAMETERS (Stochastic Indicator Settings) - AVERAGE PARAMETERS (Moving Average Indicator Settings) - PLACE PENDING ORDER OR AT MARKET - AVERAGE PRICE: DISTANCE, MULTIPLIER, MAX LOT AND IN FAVOR OR AGAINST TREND - MAXIMUM DRAWDOWN (Maximum Allowable Cash Loss) 3. Strategies: 3.1 123 Setup Strategy with Stochastic: - Implement the buy/sell strategy based on the 123 pattern, using the stochastic indicator to check overbought or oversold conditions. - Consider provided stochastic parameters as part of the inputs. 3.2 123 Setup Strategy with Averages: ...

I am looking for a freelancer to help me with a project that involves evaluating image quality with implementing machine learning algorithms on an FPGA. VIVADO would be preferred to work on. I am seeking a detailed project proposal from freelancers. with Verilog coding Ideal skills/experience: VERILOG VIVADO

My project requires the efficient application of Gaussian filtering in Verilog specifically for enhancing image details. The image type for this task is RGB, and the intended result should lead to clear, detailed images showcasing the potential of Gaussian filters. Key requirements include: - Applying Gaussian filtering to provide image enhancement - Working specifically with RGB images - Delivery of processed images in JPEG format Given the technical nature of this project, proficiency in Verilog and image processing is crucial. A deep understanding of Gaussian filtering algorithms is also necessary. Experience with image manipulation software would be a bonus. This project is ideal for freelancers who are detail-oriented and are adept at transforming complex requirements...

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I'm seeking an experienced and detail-oriented developer to create a Custome PCILeech firmware for SCREAMER PCIE SQUIRREL direct access memory card utilizing the 7 Series FPGA 35t chip. Firmware must...Squirrel. Firmware must bypass and avoid anti-cheat detection on EAC/BE etc. Responsibilities: - Develop firmware for PCILeech FPGA - Debugging and problem-solving throughout firmware development Skills & Experience: - Strong experience in FPGA programming and firmware development - Excellent debugging and problem-solving skills - Experience with high-speed data transmission - Proficiency with VHDL/Verilog languages The timeline for project completion is flexible, indicating a strong emphasis on quality over speed. However, I am eager to commence with the right candidate a...

... W ) for the profit associated with producing q units. E. What optimum combination of capital and labor corresponds to maximum profit if there are no budget constraints? F. What is the optimal profit when we apply the budget constraint of $4600 to the formulation? the optimum values of W , K and profit P (K, W ) when the budget is increased by one dollar. H. Let λ be the Lagrange multiplier. Does increasing the budget by $1 allow the production of λ extra units of the product? Explain why. Why are the values equal to each other (1.81=1.81) I. Does the value of λ change if the budget changes from $4600 to $5600? (Ans: NO, but need help to explain using the G and F equations) J. What condition must a Cobb-Douglas production function q = cKαW β satis...

For this project, I need a skilled Verilog programmer with FPGA implementation experience. The key task is to encode a 4x4 binary (black and white) image into an 8x8 image using least significant bit replacement. Key Responsibilities: - Implementing a least significant bit replacement algorithm. - Delivering clean and efficient Verilog code. - Ensuring compatibility with FPGA hardware. Required Skills and Experience: - Proficiency in Verilog code - Understanding of LSB replacement - Experience with FPGA implementation - Working knowledge of image processing, specifically with binary images.

...1 to 100, with each rank costing double the amount of the previous rank (starting at 2000 points for rank 1). i want to create a command called ".rankup" that checks the player's money balance and deducts the appropriate amount if they can afford it, If the player can afford it, update their rank and apply the points multiplier bonus. if they don't, notify them saying they don't have enough also, update their clan tag to display their new rank, also want the points multiplier to increase by one each time the player ranks up, starting at x1 for rank 1 and reaching x100 for rank 100. and also want a command called .rank which tells them about what rank they are, its very detailed and most likely hard to code and doubt anyone is gonna do it for free f...

I am looking for a skilled Verilog coder with experience in advanced digital circuit design and implementation. Tasks will involve designing and implementing complex circuits, specifically those involving CPUs or intricate state machines. Key Responsibilities: - Design and implement advanced digital circuits - Test and debug created designs - Maintain documentation of design process and circuit function Skills & Experience: - Expertise in Verilog coding - Experience with complex digital circuit design and implementation - Familiarity with CPUs and complex state machines - Proficiency in using Xilinx Vivado for running Verilog simulations Please ensure you have this experience before placing a bid on this project.

Completing an intermediate-level circuit simulation is on the top of my agenda, and time is of the essence. Key Requirements: - Generate a simulation circuit using either Verilog or VHDL. - The complexity level should be intermediate, meaning that it should include components such as adders, decoders, and multiplexers. Ideal Candidate: An experienced freelancer with a strong background in circuitry and simulation languages such as Verilog or VHDL. Quick response and comprehension of task requirements are paramount due to the urgency of the project. Remember, the successful completion of this project is deemed urgent. Therefore, a prompt response and start are appreciated.

I'm in need of an individual skilled in Verilog who can help me achieve a specific task. - Task: Your main responsibility would be writing Verilog code for a simple module implementation. This does not involve complex system level code designs or CPU architecture. - Objective: The primary objective of the module is to model a specific digital logic circuit. The project does not require interaction with other modules or utilization of specific hardware components. The ideal candidate would possess: - Solid experience in Verilog coding, - Expertise in digital circuits, - Strong understanding of digital logic circuits, - A meticulous approach to ensure accuracy in modeling the required digital logic circuit. If you are passionate about Verilog and love c...

...achieving a specific task. I already have a code for core RISC-V in system Verilog and need help running it in my Linux based virtual machine. The final objective includes enabling a basic load counter and comprehending the code thoroughly. need to create a presentation for my Verilog project. For the first task, I need to count the number of instructions entering the pipeline after a mispredicted branch, which is important for security. I need to run a test code to measure performance and count the flushed instructions. Can you help with this in Verilog? We can work together on it and complete the presentation.? To achieve the listed tasks, the freelancer should possess: - Expert knowledge and experience in working with Verilog, - Proficiency in executi...

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...went against me) and after that hit the first take profit it should close the next avarage limit order and when it hit the last tp it should close all limits on the same currency / asset in addition I need another tool in which I can determine the multiples of the distance between the VWAP and the strips and between the strip to the strip in jumps of 0.05, which if For example, I will place a multiplier of "2", so the distance between strip and strip will be 2 times the deafult distance. i've added pictures and video for better understanding....

In this project we will be implementing a control system using the Lattice iCE FPGA. The task at hand involves converting a schematic for a Synchronous Data Link Control (SDLC) data stream to an SPI Master data stream converter to Verilog or VHDL and then verifying the design through simulation. And finally creating the file that will be used to program the target part in production. The ideal freelancer for this job is proficient in working with FPGAs, preferably with a strong background in the Lattice iCE FPGA. I’m looking for someone adept in schematic to HDL conversion. Experience in working with SDLC data will serve as a plus. Please ensure that your experience and skills include: - FPGA development, specifically with the Lattice iCE. - Expertise in schematic to HDL ...

Introduction Rocket Launcher Multiplier Web App is an online betting platform where users can place bets on the launch of a rocket and potentially multiply their bet amount based on the duration of the rocket's flight. The app incorporates real-time betting, rocket launches with a delay, and a leaderboard to showcase the top players. Functionalities 1. Real-Time Betting •Users can place bets using their wallet account in real-time. •Betting amounts are deducted from the user's wallet upon placing a bet. •Payment integration with Stripe. 2. Rocket Launch and Betting •The rocket launches after a 3-second delay. •Users can place bets before the rocket launch and during its flight. •Users have the option to exit the bet before the rocket'...

...stakes of equivalent 50c, $1, $5, or $10, with higher stakes increasing their chances of winning. - The game's total payout pools grows with each play, ensuring a dynamic and exciting user experience. - Blockchain Transparency: Utilize the Monero blockchain to offer transparent, verifiable transactions, guaranteeing fairness and building trust within the gaming community. Key Features: Include multiplier opportunities to enhance winnings and a competitive leaderboard to engage and retain players. Looking For: - Expertise in cryptocurrency and blockchain technology. - Ability to design intuitive, minimalist user interfaces. - Passion for creating engaging, strategic game mechanics. If you're excited about combining innovative blockchain technology with captivating gam...

I'm currently in search of an expert in electronics, Specifically FPGA's and Verilog who can assist in creating a 32 channel logic analyzer. The analyzer's primary role will be to facilitate the debugging of digital circuits, analyzing serial communications, and examining micro-controller signals and digital protocols. Key Responsibilities: - Design and create an analyzer able to decipher multiple digital protocols including CAN, SPI, I2C, UART, RS422, RS485, i2C 1-Wire, and SIM devices. - Equip the analyzer with a unique functionality to understand and interpret data in custom HEX, Bianry and ASCII formats. Ideal Experience and Skills: - Proficient in digital protocols and encoding. - Extensive experience in electronics, especially in creating and debugging logic ...

Its about vintage videogames I have a project that make emulation of cartridges. Each original Cartridge have circuits with ASIC customs called " mappers ". Theses mappers circuits are not available for sale, because was made in 90 years. Some hackers rebuild functionality of Asics throught verilog, and implemented in a single cartdridge with ALL mappers inside. In Github are The opensource project , and ALL mappers writed in verilog are available separated. My Idea is take one a one mapper and generate a output file and burn in individual hardware , like Xillinks XC9572 or XC95144 because The original project use hard weight hardware,like a