Verilog / VHDL Jobs og konkurrencer

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers.
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Projekt/konkurrence Beskrivelse Bud/Indlæg Færdigheder Påbegyndt Slutter Pris (EUR)
write a simple code for sample testing k Please check new schematic diagram in attached. And IC datasheet. Please write a simple code for sample testing 5 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, Kredsløbs Design Nov 22, 2017 I dag6d 22h €93
Using VHDL Implement a simple MIPS-2 RISC Processor It is a Project Using VHDL Implement a simple MIPS-2 RISC Processor. i will give the details later. 1 Verilog / VHDL, Elektrisk Ingeniørarbejde Nov 22, 2017 I dag6d 16h €141
System Verliog task available I need someone who can do task on system verilog. Deadline is 2 days. I want someone who can start now. More details will be provided to interested freelancer 6 Ingeniørarbejde, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 22, 2017 I dag6d 15h €20
Computer Design and ProtoTyping build a 32 bit architecture CPU, the CPU include the Register File, ALU, Control Unit, Instruction Register, Data Memory, PC Register, Shift logic unit, Conditional Logic Unit, and a 3-level cache read and write memory for the Data memory. The units need to be built in Verilog HDL then represented as a symbol on a schematic diagram and connected together using wires. Accompanied with each unit s... 6 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, FPGA Nov 22, 2017 I dag6d 11h €141
VHDL coding needed to be done by expert!! VHDL coding needed to be done by expert!! $30 CAD pay 6 Ingeniørarbejde, Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 22, 2017 I dag6d 10h €20
UVM verification of memory controller - open to bidding Need someone to verify a memory controller using UVM environment. CAN bus is used as a memory cycle initiator and write/read burst transactions need to be verified. 3 Perl, Verilog / VHDL, Shell Script, FPGA, Very-large-scale integration (VLSI) Nov 21, 2017 Nov 21, 20175d 20h €263
SMC Interface and SPI Slave Logic for CPLD Project 1) Implement high-speed 8-bit bus for MCU (ATSAM3U) to connect to Altera CPLD (5M160ZM68C5N) 2) Implement SPI Mode-0 SPI Slave in CPLD logic 3) Implement Dual SPI Slave mode in CPLD logic 4) Implement QUAD SPI Slave mode in CPLD logic 5) Implement general purpose I/O (8-bit) Port B in CPLD logic 6) Implement JTAG Host shift logic in CPLD logic 6 C programmering, Elektronik, Verilog / VHDL, Microcontroller, FPGA Nov 21, 2017 Nov 21, 20175d 17h €25
Vhdl project Need experts in electrical engineering field especially in FPGA and Embedded systems that are also skilled in vhdl. Please look at the link for more details. Refer to the intro pdf for project requirements and deliverables. Need complete project done even the scripts for presentation and technical report. [url fjernet, log ind for visning] 15 Ingeniørarbejde, Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 20, 2017 Nov 20, 20175d 4h €338
Home Automation - Circuit Debugging Assistance It's a basic home automation project. I am able to control the relay without any problem until i connect it with a ac appliance (bulb). 14 Ingeniørarbejde, Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde Nov 20, 2017 Nov 20, 20174d 23h €15
Video transmission system and USB emulator Project for huge experienced engineers. Result: Altium project and firmware. Details of the project in the attachment. 2 Elektronik, Verilog / VHDL, PCB Layout, FPGA Nov 20, 2017 Nov 20, 20174d 23h €1094
32-bit MIPS processor in VHDL The processor I want to design is a 32-bit version of the MIPS processor, however the instruction set only needs to be a small subset of the actual MIPS ISA. It should implement the multicycle datapath version of the processor utilizing the VHDL hardware descriptive language. The processor should support three instruction formats: R-format, I-format, and J-format The memories should be word ad... 6 Ingeniørarbejde, Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde Nov 20, 2017 Nov 20, 20174d 11h €66
6522 VIA and AY-3-891x Sound Generator Project For Retro Sound Card I currently have a Xilinx ISE project where I am emulating a 6522 VIA and AY-3-891x Sound Generator for a legacy sound card. See the attached project files (and datasheets if needed). The code is mostly working and well enough to achieve sound, however I believe there could be some issues with the way PWM is implemented as there seems to be distortion in the combined audio output per channel. ... 4 Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 19, 2017 Nov 19, 20173d 21h €362
Differential Scan-attack and countermeasures on AES crypto-algorithm Hi, I wanted to implement research work on the AES(Advnaced Encryption Standard) algorithm and differential scan attack on the same to retriever secret key. In addition, the prevention mechanism against such attack has to be developed. Coding and simulation in verilog(Xilinix-ISE/Modelsim) will be fine. Also, requires documents for the implementation (step-by-step procedure), block diagram ... 7 Ingeniørarbejde, Verilog / VHDL, Elektrisk Ingeniørarbejde, Kryptografi, FPGA Nov 19, 2017 Nov 19, 20173d 12h €836
Project for Julius C. Hi can you handle vhdl task ? 2 Java, Android, Verilog / VHDL, , Programmeringssproget R, Raspberry Pi Nov 18, 2017 Nov 18, 20176d €30
VHDL task URGENT Please check the attachment for the details Need to use Quartus ll 8 Ingeniørarbejde, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 18, 2017 Nov 18, 20173d €42
FPGA implementation of three phase locked loop i want to implement three phase locked loop implemented in simulink 20 Ingeniørarbejde, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 18, 2017 Nov 18, 20172d 12h €413
Design Microcontroller Code Devise a communication protocol/method to communicate to between devices, through RS232. There is one ‘master’ and up to two slaves, which communicate two ways. Slaves will have unique addresses. Code needs to be compatible with ATMEL microcontrollers as this is what will be used. Communication is simple and will take the following form; • Master to slave o Turn output 1 to 8... 24 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, Arduino Nov 18, 2017 Nov 18, 20172d 10h €121
I need assembly MIPS I need assembly MIPS... thanks 18 C programmering, Verilog / VHDL, C++ Programmering, Montage, x86-x64 Assembler Nov 17, 2017 Nov 17, 20172d 3h €84
FPGA and DSP develper Looking for a developer to learn and implement a real time hardware implementation of spectrum analyzer upto 100mhz bandwidth using FPGA, fast ADCs and DACs. 16 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, FPGA Nov 17, 2017 Nov 17, 20171d 11h €47
Embedded systems -- 2 Regarding verilog code 17 Verilog / VHDL, Microcontroller Nov 17, 2017 Nov 17, 20171d 10h €72
System Verilog Project It is a System Verilog Project. I will give the details later. 10 Verilog / VHDL Nov 16, 2017 Nov 16, 201717h 1m €31
I need help with computer circuit design questions -Computer System Architecture -Basic Computer Organization and Design -Register Transfer and Microoperations -Digital Components for Integrated Circuits 5 Ingeniørarbejde, Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde, Kredsløbs Design Nov 15, 2017 Nov 15, 2017Udløbet €17
embeddded work [url fjernet, log ind for visning] a DE0-Nano FPGA board to a UNO board using two jumper wires for data transfer and one wire to connect their grounds. Write codes that allow the microprocessor to use one wire to send a bit over to the FPGA which inverts the bit and sends it back to the microprocessor using the other wire. The bit value to be sent out from the UNO should be input from the seri... 1 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, Arduino Nov 15, 2017 Nov 15, 2017Udløbet €8
Code a problem that is common to the Computational Science domain and whose solution can be coded using the gsl (GNU Scientific Library).  Practice using all C++ statements/types covered throughout the term and the gsl.  Solving Circuits with Kirchoff Laws. You are to display appropriately labelled voltages and currents for the circuit to STDOUT. It is assumed that the user of this program is familiar with the circuit given in the exercise so don’t try to display it. Given that the goal of this exercise is to use the gsl, you are expected to use as many functions as possible in the gsl to compute a solut... 8 C programmering, Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde, C++ Programmering Nov 14, 2017 Nov 14, 2017Udløbet €14
run simulation on simulink I need someone to run a simple simulation on matlabs Simulink for me with various inputs. 27 Ingeniørarbejde, Elektronik, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde Nov 14, 2017 Nov 14, 2017Udløbet €19
Design OTA in 180nm in Cadence Virtuoso I want to design OTA in Cadence vituoso with 180 nm Technology and some other specification 2 Elektronik, Verilog / VHDL, Very-large-scale integration (VLSI) Nov 13, 2017 Nov 13, 2017Udløbet €191
vlsi project the tool required to be used is l-edit software 5 C programmering, Ingeniørarbejde, Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde Nov 13, 2017 Nov 13, 2017Udløbet €201
Design a circuit using combinational logic circuits I need to design a circuit using combinational logic circuits (multiplexers and/or encoders and/or decoders and/or adders, etc.) based on the following information: Inputs: -CurrentSpeed (CS): 8-bits -DesiredSpeed (DS): 8-bits -AmIGoingToDie (Die): 1-bit -CurrentThrottlePosition (CurrTP): 7-bits (0 – 100 in decimal) Outputs: -SetThrottlePosition (SetTP): 7-bits (0 – 100 in d... 16 Ingeniørarbejde, Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde, Kredsløbs Design Nov 13, 2017 Nov 13, 2017Udløbet €36
Need a programmer Coding 8 Verilog / VHDL Nov 13, 2017 Nov 13, 2017Udløbet €26
Project for Anh D. Hi sysdesigner13, I noticed your profile and would like to offer you my project. We can discuss any details over chat. 2 .NET, Linux, Verilog / VHDL, , VB.NET, Swing (Java) Nov 12, 2017 Nov 12, 20179h 3m €19
VHDL : Digital System Designer Looking for an expert on creating digital systems and digital hardware/circuit design using VHDL 15 Elektronik, Verilog / VHDL, Elektrisk Ingeniørarbejde, Digital Design, Computer Science Nov 12, 2017 Nov 12, 2017Udløbet €307
Project for Rahul B. Hi Rahul B., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 2 Matlab and Mathematica, Verilog / VHDL, Microcontroller, Matematik, , Montage Nov 11, 2017 Nov 11, 2017Udløbet €62
need an expert in verilog Verilog and VHDL expert needed 15 Ingeniørarbejde, Verilog / VHDL, Elektrisk Ingeniørarbejde, LabVIEW, FPGA Nov 11, 2017 Nov 11, 2017Udløbet €16
Arithmetic logic unit project hi i need someone expert professional in verilog languages to build my project i will send requirement via chat box 22 Ingeniørarbejde, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 11, 2017 Nov 11, 2017Udløbet €30
implement one project with system verilog in Zynq I need to implement the threshold block and verify that with two AXI VIP as you can see in the picture. I need a testbench which generates random numbers between 500 to 1000 and the threshold block count the number of data more than 500. the project can be done also with ILA but at this point I prefer system Verilog. Xilinx has a tesbecnh example which helps to write a code quickly. 4 Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 9, 2017 Nov 9, 2017Udløbet €81
embedded systems 1 4. Connect a DE0-Nano FPGA board to a UNO board using two jumper wires for data transfer and one wire to connect their grounds. Write codes that allow the microprocessor to use one wire to send a bit over to the FPGA which inverts the bit and sends it back to the microprocessor using the other wire. The bit value to be sent out from the UNO should be input from the serial monitor while the bit... 2 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, Arduino Nov 8, 2017 Nov 8, 2017Udløbet €25
VHDL project Digital clock with Pmod OLED rgb display connected to FPGA Nexys4 DDR based on VHDL programming , including Digital clock package having the features of time sitting , alarm sitting ( on-off , a standard ringtone and flashing leds-2 LED CHASER- ) , stopwatch sitting By default that display current date and time on two lines Day dd/mm/yyyy : MON 17/02/2017 hh:mm:ss (AM/PM) : 11:23:55 AM ... 10 Verilog / VHDL Nov 8, 2017 Nov 8, 2017Udløbet €132
vhdl code using xilinx vhdl code using xilinx and simulate it using isim 14.7 7 Ingeniørarbejde, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, FPGA Nov 7, 2017 Nov 7, 2017Udløbet €27
embedded systems Modify the previous assignment so that, a bit string of 16 bits is sent from the UNO to the FPGA using a single data wire plus one or two control wires for synchronization (which could be either strobing or handshaking). When a pushbutton on the FPGA board is depressed and released, the FPGA sends a bit string of 16 bits to the UNO for display. Depending on the XOR result on the 16 bits, the ... 12 Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 7, 2017 Nov 7, 2017Udløbet €157
embedded systems3 4. Connect a DE0-Nano FPGA board to a UNO board using two jumper wires for data transfer and one wire to connect their grounds. Write codes that allow the microprocessor to use one wire to send a bit over to the FPGA which inverts the bit and sends it back to the microprocessor using the other wire. The bit value to be sent out from the UNO should be input from the serial monitor while the bit... 3 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, Arduino Nov 7, 2017 Nov 7, 2017Udløbet €25
FPGA Project Detail will be given in contact. 19 Elektronik, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, FPGA Nov 7, 2017 Nov 7, 2017Udløbet €147
Design a multi-cycle implementation of the reduced MIPS architecture and implement it on the DE2-115 board. esign a multi-cycle implementation of the reduced MIPS architecture and implement it on the DE2-115 board. You will need to add I/O to the approach discussed in the text. Add the following peripherals: interrupt system connected to a push button, slide switches, green LEDs, red LEDs, and the 7-segment display. Develop a test program to verify you machine works and run it on the simulator and on t... 7 Verilog / VHDL Nov 6, 2017 Nov 6, 2017Udløbet €144
Real time face detection on FPGA I have to do real time face detection on FPGA. I want someone intellectual to do it. Hardware implementation is required. 7 C programmering, Verilog / VHDL, Microcontroller, Elektrisk Ingeniørarbejde, FPGA Nov 6, 2017 Nov 6, 2017Udløbet €368
OFDM SYSTEM -- 4 - 06/11/2017 14:07 EST I need some to write like a chapter about OFDM system with mathematical equations about 5 to 10 pages with out any plagiarism. I need some to write like a chapter about OFDM system with mathematical equations about 5 to 10 pages with out any plagiarism. I want a description of this attached block diagram with all equation and mathematical staff for OFDM SYSTEM in sequences starting from first bl... 10 Ingeniørarbejde, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde, Matematik Nov 6, 2017 Nov 6, 2017Udløbet €127
Mips simulator with different instruction format. The main project is in Documents2 pdf. Go through that. The instruction format that has to be followed is given in the Documents21 file. Also, the disassembly file is given which also contains the instruction format result. Only the interested people bid on this project. No new freelancer with a fake id. I am sick of you guys. 5 Java, Verilog / VHDL, Software Arkitektur, Montage Nov 4, 2017 Nov 4, 2017Udløbet €50
verilog or vhdl code for pid controller - 03/11/2017 09:28 EDT i want verilog or vhdl code which can be implement on xilinx fpga 11 Verilog / VHDL Nov 3, 2017 Nov 3, 2017Udløbet €17
verilog or vhdl code for pid controller i want verilog or vhdl code which can be implement on xilinx fpga 2 Verilog / VHDL Nov 3, 2017 Nov 3, 2017Udløbet €12
VHDL for Digital System Design It is a project on VHDL for Digital System Design. I will give the details later. 10 Verilog / VHDL Nov 3, 2017 Nov 3, 2017Udløbet €53
KC705 and SD Card I want VHDL implementation of data saving to SD card and reading it back when necessary. Main deliverables are: 1. VHDL Code using KC705 Evaluation kit. Detailed commenting must be there inside code to better understand the code. 2. Complete documentation of the code so that it can be enhanced in future. 3. Examples on how to use the code to write or read. 4. Detailed information on interface ... 2 Elektronik, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde, FPGA Nov 3, 2017 Nov 3, 2017Udløbet €23
simulink microgrid need professional on simulink, microgrid, and voltage sag 12 Ingeniørarbejde, Elektronik, Matlab and Mathematica, Verilog / VHDL, Elektrisk Ingeniørarbejde Nov 3, 2017 Nov 3, 2017Udløbet €36
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