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    1,681 need an expert on vhdl to do a simple task jobs fundet, i prisklassen EUR
    VHDL help needed for fpga projects 6 dage left

    Need an expert in xilinx vivado Projects are based on digital systems on topics such as Multiplexers Flip flops registers Counters Clock dividers Please contact for project instructions and further details

    Elektrisk Ingeniørarbejde Elektronik Ingeniørarbejde FPGA Verilog / VHDL
    €116 (Avg Bid)
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    9 bud
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    Snake Game in Verilog with VGA support. 6 dage left

    Snake Game : 1.) Should run on Altera DE2 Board or on basy3 . 2.) Should Support VGA. 3.)Needed in a 3 days. skills:- verilog software:vivado i need this project in verilog and not in VHDL

    Verilog / VHDL
    €67 (Avg Bid)
    €67 Gns Bud
    5 bud
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    Need 4 FPGA VHDL engineers & 2 embedded engineers 1 dag left
    VERIFICERET

    I would like to discuss with freelancers having strong expertise in programming languages like VHDL, Verilog, Matlab, embedded C Please reach out to me. Engineering B.Tech. is must

    C programmering C++ Programmering FPGA Matlab and Mathematica Verilog / VHDL
    €14 / hr (Avg Bid)
    €14 / hr Gns Bud
    29 bud
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    I would like to hire a Verilog / VHDL Designer to write any encryption code for FPGA (Stratix IV) using Quartus/ModelSim Udløbet left

    Any encryption code (AES/RSA) written in VHDL/Verilog in Quartus II for fpga board stratix IV. Please contact for more details.

    FPGA Verilog / VHDL
    €29 (Avg Bid)
    €29 Gns Bud
    3 bud
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    risc processor design and test ,vhdl Udløbet left

    risc processor design and test, more detail I will provide on chat

    Elektrisk Ingeniørarbejde Elektronik Microcontroller Verilog / VHDL
    €92 (Avg Bid)
    €92 Gns Bud
    16 bud
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    Custom SPI Master Controller in VHDL Udløbet left

    Create a custom SPI master controller with single, dual, and QUAD operation modes in VHDL for a MAX V CPLD.

    Elektrisk Ingeniørarbejde Elektronik FPGA Microcontroller Verilog / VHDL
    €338 (Avg Bid)
    €338 Gns Bud
    9 bud
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    digital electronics, verilog and VHDL subject explanation with clear examples and corresponding waveforms Udløbet left

    This is pavan. I am from the VLSI industry. I need a technical writer to explain 3 subjects(digital electronics, Verilog, and VHDL).

    Digital Design FPGA Microcontroller Teknisk Forfatning Verilog / VHDL
    €105 (Avg Bid)
    €105 Gns Bud
    17 bud
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    (BIST) Built in self test verilog/ vhdlcode for memory Udløbet left

    The aim of the project is to design a BIST controller to insert and detect the faults (defect) like Read disturbance, Erase disturbance, Program disturbance, SAF, TF, ADF, CFs, TF, NPSF, Retention fault in FLASH memory by using BIST algorithm like March algorithm using verilog or VHDL in Xilinx or Modelsim. Need Simulation waveforms for the same.

    Ingeniørarbejde Microcontroller Verilog / VHDL
    €358 (Avg Bid)
    €358 Gns Bud
    2 bud
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    Vhdl LCD finctional Udløbet left

    In ready projekt on vhdl (tic tac toe game) I need to add state od the gamę on LCD [log ind for at se URL]

    Elektrisk Ingeniørarbejde Elektronik FPGA Microcontroller Verilog / VHDL
    €28 (Avg Bid)
    €28 Gns Bud
    5 bud
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    Write VHDL Code in Zedboard Udløbet left

    I need to write a VHDL code for transfer data from 2 zedboard using ethernet without using a zynq-processor

    Elektrisk Ingeniørarbejde FPGA Verilog / VHDL
    €180 (Avg Bid)
    €180 Gns Bud
    12 bud
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    VHDL design for parallel to serial project Udløbet left

    I have a short project to do for an Altera 5M160Z CPLD (160 LE). This board has a 16-bit bus from a MCU and 8 control lines and output to a 10-pin port. What I need is a VHDL project (Quartus) that will implement a custom full duplex parallel to serial design. Development using simulation is fine.

    Elektrisk Ingeniørarbejde Elektronik FPGA Microcontroller Verilog / VHDL
    €16 / hr (Avg Bid)
    €16 / hr Gns Bud
    10 bud
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    Evaluate embedded operating system Udløbet left

    add memory protection into the operating system, This project needs both hardware and software knowledge, you will be creati...the operating system, This project needs both hardware and software knowledge, you will be creating / implementing OS functions on the PicoBlaze, programming in assembler. You may also need to modify the hardware using VHDL.

    Assembla FPGA Verilog / VHDL
    €450 (Avg Bid)
    €450 Gns Bud
    10 bud
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    2 simple C and VHDL tasks! -- 2 Udløbet left

    Hello guys I will need these simple tasks for $10USD the deadline is today 8 September. Description In C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would like comments on the code and the new resulting image as deliverables. I attac...

    C programmering FPGA
    €96 (Avg Bid)
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    1 bud
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    2 simple C and VHDL tasks! Udløbet left

    Hello guys I will need these simple tasks for $10 - $15 USD the first until today 8 September the second until tommorow 9 September. 1) in C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory). I would comments on the code and the resulting ima...

    C programmering FPGA Verilog / VHDL
    €22 (Avg Bid)
    €22 Gns Bud
    2 bud
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    code VHDL avec capteur de temperature et buzzer Udløbet left

    écrire un code vhdl , pour DE0 nano , permettant de lire la température a partir d'une entrée analogique avec un LM19 et en sortie il faut emmètre des son avec un buzzer ( différent fréquence en fonction de la température )

    Elektrisk Ingeniørarbejde Elektronik Ingeniørarbejde LabVIEW Verilog / VHDL
    €31 (Avg Bid)
    €31 Gns Bud
    2 bud
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    2 simple C and VHDL tasks Udløbet left

    Hello guys I will need these simple tasks for $10 - $15 USD until 6 or 7 of September. 1) in C language, i will need embedded a median filter that I need to pass after a FPGA microblaze with image data (128x128) (with and without cache memory) 2) I need just a divider in vhdl language to pass through and confirm with n...

    C programmering Verilog / VHDL
    €24 (Avg Bid)
    €24 Gns Bud
    3 bud
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    VHDL help - Long Term Udløbet left

    I need help with the structural in Xilinx. I will give you full details. Regards

    Kredsløbs Design Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Verilog / VHDL
    €21 (Avg Bid)
    €21 Gns Bud
    23 bud
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    Engineers Required (Asians Stay away) Udløbet left

    Hello freelancers I have a lot of projects in all engineering fields so i am looking for Electrical & Electronics engineer Mechanical Engineer Civil Engineer Engineers should be expert in following fields Arduino Matlab Raspberry Pi FPGA Verilog/VHDL Python PCB Design (Eagle/Altium) Solidworks AutoCAD if you are expert in any of above mentioned

    Civil Ingeniørarbejde Elektrisk Ingeniørarbejde Indbygget Software Ingeniørarbejde Mekanisk Ingeniørarbejde
    €33 (Avg Bid)
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    111 bud
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    Project for ahmedmohamed85 -- 18/08/31 15:44:11 Udløbet left

    ...name is Paride, nice to meet you. i have got your conctact from Alessandro, a classmate. I am working on a easy Vhdl project, i already wrote all the code, the simolulation is working, but i need your help for two fast tasks: • I need to assign the pins on my FPGA, i can't find the correct pin of 2 serial signals. • ...

    Elektrisk Ingeniørarbejde Elektronik Ingeniørarbejde Microcontroller Verilog / VHDL
    €50 (Avg Bid)
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    1 bud
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    ADC - VHDL Implement Udløbet left

    Implement an AD2949 IC input block and some more

    Elektrisk Ingeniørarbejde Elektronik FPGA Microcontroller Verilog / VHDL
    €458 (Avg Bid)
    €458 Gns Bud
    11 bud
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    content writer for the electronic subjects Udløbet left

    I want a content writer who knows digital design or digital electronics and vhdl subjects very well.

    Article Writing Skrivning Elektronik Research Writing Teknisk Forfatning
    €72 (Avg Bid)
    €72 Gns Bud
    21 bud
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    PRESENT-80 Udløbet left

    ...This project is related to lightweight cipher, cryptography. I have attached a pdf containing information relevant to this project which can be found in section 3.1 of uploaded pdf (round-based based architecture of PRESENT-80). The code has already been developed and I'm getting the proper results as well. But I want to build a clock based design so

    Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Java Verilog / VHDL
    €48 (Avg Bid)
    €48 Gns Bud
    4 bud
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    Piccolo cipher implementation in VHDL/Cryptography Udløbet left

    ...This project is related to cryptography. I have attached a pdf containing information relevant to this project which can be found in the pages between 342 to 355. The code has already been developed and I'm getting the proper results as well. But I want to build a clock based design so that I can perform power analysis on it. Need the...

    Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Verilog / VHDL
    €26 (Avg Bid)
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    2 bud
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    Програмування ПЛІС VHDL/Verilog Udløbet left

    Науково-дослідний проект в галузі неруйнівного контролю. ____________________________________________________________ Scientific research project in the field of non-destructive testing.

    Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Microcontroller Verilog / VHDL
    €337 (Avg Bid)
    €337 Gns Bud
    3 bud
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    Piccolo cipher implementation in VHDL/Cryptography - 05/08/2018 19:27 EDT Udløbet left

    Hi there! I'm based in Hyderabad, India. This project is related to cryptography. I have attached a pdf containing information relevant to this project which can be found in the pages between 342 to 355. The code has already been developed but I'm unable to procure the final result. ( As i can see that the individual modules are successfully executing

    Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Verilog / VHDL
    €137 (Avg Bid)
    €137 Gns Bud
    9 bud
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    need expert on VHDL Udløbet left

    expert on VHDL is need for a project on digital thermostat. This is a simple task. expert only should bid

    Elektrisk Ingeniørarbejde Elektronik FPGA Microcontroller Verilog / VHDL
    €63 (Avg Bid)
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    20 bud
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    VHDL project Communication Udløbet left

    build a communication block in VHDL at Xilinx environment

    Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Matlab and Mathematica Verilog / VHDL
    €348 (Avg Bid)
    €348 Gns Bud
    14 bud
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    Communication VHDL Comm port Udløbet left

    Implement Communication VHDL Comm port on Xilinx FPGA part

    Elektrisk Ingeniørarbejde Elektronik FPGA Microcontroller Verilog / VHDL
    €109 (Avg Bid)
    €109 Gns Bud
    16 bud
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    Task in VHDL Udløbet left

    i have a task related to Communication VHDL Xilinx, i will share the details in chat.

    C programmering Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Verilog / VHDL
    €99 (Avg Bid)
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    19 bud
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    realization of pid controller in vhdl (quartus) for the plant(first order equation) with laser input signal Udløbet left

    will explain in detail when you bid

    Verilog / VHDL
    €162 (Avg Bid)
    €162 Gns Bud
    13 bud
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    i neeb vhdl project Udløbet left

    i need vhdl project for fpga bord i need skeleton and can move

    Elektrisk Ingeniørarbejde Ingeniørarbejde FPGA Microcontroller Verilog / VHDL
    €21 (Avg Bid)
    €21 Gns Bud
    14 bud
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    FPGA ALTERA - VHDL project Udløbet left

    Need help developing a face detection system with the DE2-115 board and OV7670. I already developed the code for the face detection but in MatLab.

    FPGA Image Processing Verilog / VHDL
    €190 (Avg Bid)
    €190 Gns Bud
    14 bud
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    Realization of transfer function on quartus using VHDL Udløbet left

    i want to realize the transfer function on fpga so any one with knowledge of vhdl and quartus tool can bid Thank you

    Elektrisk Ingeniørarbejde Elektronik FPGA Verilog / VHDL
    €32 (Avg Bid)
    €32 Gns Bud
    6 bud
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    vhdl project Udløbet left

    I need you to implement a vcdl design project

    Verilog / VHDL
    €62 (Avg Bid)
    €62 Gns Bud
    16 bud
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    Hardware Entwicklung gemäß DO-254/MIL-STD-1553 Udløbet left

    ...der Digital- / Analotechnik - Kenntnisse von Simulations- und Prüfumgebungen - Kenntnisse mit technischer Dokumentation/Nachweisführung. Technisch: - OrCAD, PSpice, FPGA/VHDL, C++ - DO-254, MIL-STD-1553...

    Kredsløbs Design Elektrisk Ingeniørarbejde FPGA PCB Layout Verilog / VHDL
    €5007 (Avg Bid)
    €5007 Gns Bud
    3 bud
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    Tic Tac Toe in VHDL Udløbet left

    I am looking someone who can fix the errors of the game tic tac toe in VHDL for DE2-115 and prepare report.

    Elektrisk Ingeniørarbejde Elektronik FPGA Microcontroller Verilog / VHDL
    €65 (Avg Bid)
    €65 Gns Bud
    4 bud
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    Design some Architecture  in VHDL Udløbet left

    I need you to develop some VHDL designs for me. I would like this software to be developed in VHDL hardware descriptive language. With a  VHDL design and simulation

    Software Arkitektur Windows Skrivebord
    €217 (Avg Bid)
    €217 Gns Bud
    3 bud
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    PID CONTROLLER ON FPGA AND PROCESS MODULE(please only guys with knowledge in vhdl ,quartus)-2 Udløbet left

    ...only serious people who would like to work and help me make a bid MY FPGA board is DEO nano SOC CYCLONE 5 1. reading an anolog signal (adc is available on board )ltc2308 is the adc which is available on fpga a board 2. realization of PID controller on FPGA 3. realization of process module on fpga (simple equation as to be r...

    Elektrisk Ingeniørarbejde Elektronik Ingeniørarbejde Microcontroller Verilog / VHDL
    €317 (Avg Bid)
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    2 bud
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    PID CONTROLLER ON FPGA AND PROCESS MODULE(please only guys with knowledge in vhdl ,quartus) Udløbet left

    ...my project and asked me to create a milestone and cancelled it and made me to wait for 3 days without answering please guys kindly dont get fooled with such experienced guys and ruin your money and time. and this is my brief description of my project and please only serious people who would like to work and help me make a bid MY FPGA board is DEO

    Elektrisk Ingeniørarbejde Elektronik Ingeniørarbejde Microcontroller Verilog / VHDL
    €50 - €121 / hr
    €50 - €121 / hr
    0 bud
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    interfacing of adc in xilinx using vhdl Udløbet left

    i will explain in brief when we discuss

    Elektrisk Ingeniørarbejde FPGA Matlab and Mathematica Microcontroller Verilog / VHDL
    €14 / hr (Avg Bid)
    €14 / hr Gns Bud
    12 bud
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    VHDL coding Udløbet left

    HDL coding from block diagram and pseudo algorithm

    C programmering C++ Programmering Elektrisk Ingeniørarbejde FPGA Verilog / VHDL
    €22 (Avg Bid)
    €22 Gns Bud
    5 bud
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    Project using VHDL for FPGA Udløbet left

    Develop a musical bell that will play a selected and programmed song in the FPGA.

    FPGA Verilog / VHDL
    €74 (Avg Bid)
    €74 Gns Bud
    4 bud
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    Convert a python program to vhdl Udløbet left

    Hi, I have opencv python programs want to implement them on the ZYNQ SoC. To be in precise want to implement custom object detection(using opencv, tensorflow) on to ZYNQ board. And also converting the python program to VHDL/Verilog.

    Arduino CUDA Python Software Arkitektur Verilog / VHDL
    €114 (Avg Bid)
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    VHDL expert needed Udløbet left

    Expert in VHDL needed to work on a code

    Elektrisk Ingeniørarbejde Elektronik Ingeniørarbejde FPGA Verilog / VHDL
    €11 / hr (Avg Bid)
    €11 / hr Gns Bud
    14 bud
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    Code Conversion Udløbet left

    Small project to write in VHDL

    C programmering C++ Programmering FPGA Microcontroller Verilog / VHDL
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    Implement an algorithm in vhdl done in Matlab using System Generator Udløbet left

    Implement an algorithm in vhdl done in Matlab using System Generator

    FPGA Matlab and Mathematica Verilog / VHDL
    €84 (Avg Bid)
    €84 Gns Bud
    11 bud
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    συμπληρωσης μιας if μέσα σε εναν κωδικας VHDL Udløbet left

    ...έλεγχο του servo πρέπει να παράγουμε μια PWM κυματομορφή. Αυτή η κυματομορφή αποτελ&ep...

    Digital Design FPGA Verilog / VHDL
    €35 (Avg Bid)
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    project is to design the logic for an FPGA that will implement the test pattern shown below. The colors and sizes do not need to exactly match. Udløbet left

    1. Create a top level VHDL file for the project. VHDL code should be well formatted and commented. 2. Add two instantiations of a sync counter to the top level that are customized for the horizontal and vertical sync signals 3. Adapt the tesbench from homework 2 to simulate the top level file. Simulations should be annotated to depict events i...

    Verilog / VHDL
    €67 (Avg Bid)
    €67 Gns Bud
    6 bud
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    Reloj, cronometro y alarma en VHDL para Basys2 Udløbet left

    Necesito hacer un programa en VHDL de un reloj (formato 24hs), con cronometro y con alarma. Cuando cambio a cada uno. no se debe perder la cuenta de la hora, cronometro o la alarma seteada. El reloj, la alarma y el cronometro se debe poder cargar/modificar manualmente. Detención y reinicio del cronometro. Cuando la hora del alarma coincida con el clock

    Elektrisk Ingeniørarbejde Elektronik Ingeniørarbejde PLC & SCADA Verilog / VHDL
    €156 (Avg Bid)
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    Project for Jaydeep Singh R. Udløbet left

    Need to Develop a VHDL program.

    Kredsløbs Design Elektrisk Ingeniørarbejde Elektronik Microcontroller PCB Layout
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