Design a digital clock using verilog nexys 4 fpga

For more details inbox me so that we can discuss in detail. For more details inbox me so that we can discuss in detail. For more details inbox me so that we can discuss in detail.

I am an EE engineer. I have lots of experience working with Xilinx and Altera FPGA boards writing VHDL and embedded C for NIOS II (field of interest). I have a background in digital design. I also worked with microcontrollers such as MSP430, Arduino, PIC, etc. ABOUT YOUR PROJECT I have done lots of similar projects (as it's seen in my portfolio) before and can handle your project easily. We can discuss it more over chat.

Hi I have been working on Verilog-VHDL and Xilinx and Altera FPGAs by more than 6 years. The bid price you have mentioned is very low compared to the project you want. But still we can negotiate, let me know your exact requirements. Thanks

Hello, I have >10 years of experience designing projects for FPGA using VHDL / Verilog. I'll complete this project and deliver high quality results. Send me the complete specs and we'll discuss the details.

Describe a bit more requirements, Do you need clock inside FPGA and some sound output to alarming?

I used to do this project in my university time (Verilog/VHDL). Please describe detailed what do you need? Hopefully I can do it for you and even more. Kindly get back to me if you need any further information.

Hi I have worked on a same project earlier also. The price mentioned is negotiable according to your requirements. Thanks

I have effiecient knowledge on Nexys 4 fpga board . i also done 2 project on this fpga board in my past . i am familiar with vivado software . i have good knowledge in verilog /vhdl language