design and implement a game clock on the DE1-SoC development board

You are required to design and implement a game clock on the DE1-SoC development board, using any of its on-board resources (buttons, switches, seven segment displays etc.). The game clock should have two modes of operation to allow the following variations:

• The first mode of operation should give each player a fixed amount of time for the whole game. There should be a suitable indication if either player runs out of time.

• The second mode of operation should be a game clock variation of your choice.

You are free to decide the user interface, but the following should be kept in mind:

• A minimum of user interface hardware (such as buttons) should be used.

• The user interface should be as easy and intuitive as possible.

• The VHDL design should use the techniques that have been discussed in the module as appropriate. This may include multiple files written in an appropriate VHDL style (hierarchical, behavioural or RTL).

• The design should be tested, including component parts of the design as appropriate, in both simulation and hardware settings.

You should produce a report (maximum 1500 words, excluding appendices), in pdf format, that gives a comprehensive account of the design process including the hardware setup, VHDL code testing and evaluation. It should also include:

• Instructions for the user.

• The full set of VHDL files in an appendix (code excerpts may also be used in the main body of the report to illustrate a particular point).

• Relevant references where appropriate.

Note: All VHDL code must be appropriately commented and developed using an appropriate design technique (block diagrams, state machine diagrams etc. as appropriate).

I need a report produced that shows the step by step procedure for a games clock such as a Chess game clock for example , i have no idea what to do with just the coding so i need the step by step instructions with some pictures of it working on the DE1 board. block diagrams, coding and pictures if DE1 board working with the games clock.

Ingeniørarbejde Verilog / VHDL C programmering

Projekt ID: #29442796

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