Mario V.

A hardware coprocessor architecture calculates the Difference-of-Gaussian (DoG) pyramid of an input image and extracts from this the interest points to be used in several image detection algorithms. Advantages of the architecture include the possibility to process the image by stripes, namely by blocks having one dimension coincident with the input image width, in the absence of an input frame buffer and the possibility to avoid RAM memory. The coprocessor is suitable to be tightly coupled with raw image so

Modern collections of algorithms for DSP and multimedia often rely on linear algebra operators to perform massive numerical transformations on vectorized data. Embedded developers often experience the worst condition of having no FPU at all in their low-power systems, as many device producers consider FP-math as an expensive option in terms of gates and power consumption. Main aim of this work is to propose a lightweight structure, designed to be used in an ARM-based environment but easily retargetable to d

High resolution video (720p, 1080i and 1080p frame sizes, up to 60 fps), even if widespread in prosumer/consumer markets, still represents an absolute challenge in the embedded and low power devices, especially due to the increasing complexity of compression schemes. H.264/AVC represents actual de facto standard for both excellent quality and low-bandwidth results. Motion estimation step (ME), for FullHD video, needs up to 80% time of the whole compression demands, if tuned to achieve optimal PSNR ratios. S