Profilbillede af ducdctoandh
@ducdctoandh
Medlem siden 15. maj 2015
3 Anbefalinger

ducdctoandh

Online Offline
6 YEAR EXPERIENCE IN FPGA/VHDL/VERILOG - 100% JOB COMPLETED - COMPLETED ABOVE 100 JOBS IN FPGA/VHDL/VERILOG - 87 VERY GOOD REVIEWS I am an electronics engineer with excellent academic background, firm language skills (IELTS 6.0) and 5-years experience in TOP SKILLS below (Graduated Very Good Degree - Top 5% graduated Student at Top University in Vietnam) TOP SKILLS 1. FPGA Design. (VHDL/Verilog) 2. Embedded System Design. (Schematic, PCB Design) 3. Software Design. (C/C++/Java/Android/Matlab) TOOLS 1. Xilinx Vivado/Xilinx ISE/IP Core of Xilinx. 2. Altium/Orcad/KidCad design. 3. DevC++/Visual Studio C/C++/Eclipse/Netbeen. 4. Matlab/LabView LANGUAGES -English: IELTS 6.0 (Reading 6.5, Speaking 6.5, Writing 6.0, Listening 5.5)
$30 USD/hr
92 anmeldelser
6.2
  • 100%Jobs udført
  • 95%Indenfor Budget
  • 98%Til Tiden
  • 19%Genansættelsesfrekvens

Portfolio

Nylige bedømmelser

Erfaring

Programmer

Oct 2014

Design FPGA/IC using Verilog/VHDL Hardware Description Language

IT Supporter

Apr 2014 - Oct 2014 (6 months)

Contact customers to fix customer’s issue in some HP software

Uddannelse

Very Good

2009 - 2014 (5 years)

Kvalifikationer

CCNA (2013)

Networking Management

Publikationer

A Generalized Link Sharing and Resource Allocation Framework for Multi-Layer Virtual Networks based on SDN

An OpenFlow protocol to control traffic in network

Certificeringer

  • US English Level 1
    83%

Verifikationer

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