VHDl Based design


Xilinx Virtex


If 1Vpp is given to ADS7038 it should convert that input into digital signal and store it into the memory of Xilinx Virtex FPGA and DAC7750 should convert the digital stored data into analog 1Vpp.

Write VHDL code for communication with ADS7038 and DAC7750 where FPGA Virtex is the master controller. Write the code on Xilinx Vivado and send simulation pictures.

The code must be synthesisable.

Also include a short description of how the communication works with these devices.

Evner: Verilog / VHDL, FPGA, Elektronik, Elektrisk Ingeniørarbejde, Microcontroller

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Om arbejdsgiveren:
( 1 bedømmelse ) Aberdeen, United Kingdom

Projekt ID: #31031406

7 freelancere byder i gennemsnit £95 timen for dette job

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We are a team of Electrical, Electronics, Software, and Mechatronics Engineers. I am an Electrical Engineer working as an Embedded System Developer. We are excellent in Embedded Firmware Development. Our Electrical tea Flere

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Hello you. I just read descriptios for your project. I have 5 years experience about pcb design and coding. I have experiences write vhdl code for FPGA chip. Your project can do very excatly and easy. If i cab help you Flere

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Hi Sir, I am an Electronics Engineer currently working as an Integrated Circuit Layout designer. I have worked writing VHDL circuit descriptions and interfacing FPGA with peripherals using SPI ports in the past. I have Flere

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Hi, I am an electrical engineer and microelectronics is my major. I also have a master thesis in communication systems. I am currently working as an embedded system engineer in the telecommunication field. My work exp Flere

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