VERILOG Files
Budget $30-250 USD
- Freelancer
- Jobs
- Verilog / VHDL
- VERILOG Files
I have some verilog files I need some work on. In the attached folder there is a verilog project called keyboard_top which is a SP/2 decoder for the arrow keys on a keyboard. I need the output from the arrow keys to be changed from individual outputs to one output as a 3 bit. (001 for up, 011 down, 101 right, 110 left.). Then I need the 3 bit output to be concatenated to a 16 bit value. There is a text file called keyinflop that has a 16 bit concatenation that can be used.
Then make sure all modules are being instantiated in the keyboard_top module.
I need a test bench to make sure it is working
Then I need that keyboard_top connected into the maze3710 project. Instanuate it in the VGAProcessor module and connect the 16 bit concatenated arrow key output value to the keyIn
8 freelancere byder i gennemsnit $122 på dette job
Dear sir I have more than 10 years experience in digital design using verilog please check my profile also please message me so that we can discuss
Hi I have been working on Verilog-VHDL and Xilinx and Altera FPGAs by more than 6 years. Please let me know if the requirement is still there I can work on it. Thanks
Hello sir/ma, I'm interested in taking this task up for you. I am an Electrical Engineer with a masters degree and I have high proficiency knowledge in FIRMWARE: FPGA firmware in VHDL and Verilog for Altera/Actel/Xilin Flere
Electronics Engineer with experience in large scale complex systems development with practicing in Verilog, SystemVerilog and Programming Firmware, C, C++. Let's Discuss further.
Hello, I have gone through your job posting and become very much interested to work with you. I am an expert in this field. I have already completed several projects like this. For evidence you can see my profile. Pl Flere
Hi I have experience in RTL Design . I can provide you with the verilog code and testbench. Also has an experience in SoC integration. Will deliver the complete design in time