i have 2.5+ year experience in design and verification,
i have done 30+ project in verilog/VHDL,
i will done your project perfectly and on time,
i will provide support after completion of project,
thanks and regardFlere
I am a senior digital design engineer,
I have a wide knowledge of digital design in ASIC and FPGA using both VHDL and Verilog.
I am using Vivado, ISE and Quartise.
I will provide you a professional report about yFlere
Please let us know the requirements for the project , we are an engineering firm and have worked on many challenging projects and I believe we can certainly implement any complex such requirements with easeFlere
I am presently pursuing masters in EMBEDDED SYSTEM DESIGN at NIT Kurukshetra
I had recently completed the Verilog HDL and FPGA course in my curriculum.
I am very well versed with these topics and done the lab work andFlere
glad to bid on your project. I have read your description,
I'm an expert on Python , R, Matlab [ Data Science / Machine Learning / Artificial Intelligence / Deeplearning ] Jupyter note book , Spyder , R sFlere