MIPS pipelined processor

I need help designing and implementing an FPGA mips pipeline. The attachment has the details for the project. If you have more questions let me know.

Note: I have noticed when I invite a freelancer to a project, the attachment is not always present. So if you need another copy of the attachment message me please.

Færdigheder: FPGA, Verilog / VHDL

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Om arbejdsgiveren:
( 53 bedømmelser ) SAN DIEGO, United States

Projekt-ID: #7464889