I require the bit plane coder and MQ coder modules developing in Verilog from the JPEG2000 standard. These can be based on any papers that are available or can be original work. More details will be provided to individuals with relevant JPEG2000 experience.
10 freelancere byder i gennemsnit $1268 for dette job
I have an experience in FPGA programming using VHDL and Verilog. I can do this project. Two my previous projects on [url removed, login to view] although were related to image compression.
Hello! I can provide you VHDL design services for 17$/hour wage. The bid amout is for 90h work. I would be happy to send you my CV. Regards, Botond