Extract critical path from Verilog netlist

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Given any Verilog netlist of a digital circuit in gate-level format, the code should extract critical path. Critical path is the longest path from input to output port. There could be multiple inputs/outputs in a given circuits. Critical path can be the longest path from any input to any output based on the connections in the circuit.

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@Kiranbholiyan

Hi Hi there, I just read your posting. It sounds like you need an expert in Verilog/VHDL I have a background in electronics and Computer architecture and have been doing this for three years. I have enough experience in Vivado and i have build my own 9-CPU on Vivado using GATE-LEVEL Design. I will be very easy for me please ping me and we can start the work straight away. Best regards, Kiran Bholiyan

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