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Make ASIC or FPGA chips optimized for an OpenCL application

We would need design and production of FPGA or ASIC units optimized to run just a specific OpenCL program as fast as possible.

This OpenCL program calculates cryptographic hash functions and has a benchmark report that displays how many hash calculations are made per second.

Your FPGA/ASIC should calculate at least 20 billion hashes per second while executing our OpenCL kernel, and should consume less than 1500W.

The software in question is here: [url removed, login to view]

and the OpenCL kernel that needs to be executed in hardware by your device is the /zcash/gpu/[url removed, login to view] source file.

We would prefer that you provide OpenCL drivers for Windows 32-bit , but we can discuss the possibility to switch to Linux.

The device interface can be USB or PCI-e or other , there are no constraints for that.

Important: Our budget will vary depending on the actual performance of your device.

Benchmark is measured by the application itself and verified by a server, and we will test together the actual performance achieved before releasing our payments.

Thanks

Errata corridge: "20 billion hashes per seconds" was wrong. The requirement is 50000 hashes calculations per second

Alternative: if the task described above is hard to accomplish, maybe you can do the following task which may be easier:
Implement a powerful FPGA/ASIC board running the software described in this board: https://forum.decred.org/threads/fpga-bitstreams.827/page-2 which uses an FPGA bitstream that can be found here: https://github.com/sprocket-fpga/Decred_LX9

What we expect is:
- you should provide me with that same software but running on Windows
- you should make an FPGA/ASIC board (and drivers) that calculates 100+ GH/s with that software ( 100 billion hashes/second), while consuming less than 1500W

The bounty we will release , as said above, depends on the actual performance obtained.

Færdigheder: Elektronik, FPGA, Microcontroller, OpenCL, Verilog / VHDL

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Om arbejdsgiveren:
( 9 bedømmelser ) S. Maria la Longa, Italy

Projekt-ID: #14868780

6 freelancere byder i gennemsnit €4574 for dette job

€7500 EUR in 30 dage
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€3055 EUR in 30 dage
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2.4
rightbigboss

hi, I am an experienced embedded developer and mainly works on FPGA and ASIC. I also works on other platforms like ARM, MIPS, DSP, etc. I read your description, and it's completely possible. Let us have a cha Mere

€3055 EUR in 10 dage
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profvipabutaleb

I'm computer engineering teaching assistant I worked before in mega projects dealing with FPGAs such as implement stream cipher algorithm encryption/decryption on FPGA , ASIC implementation of Auto focus - Camera Mod Mere

€3000 EUR in 30 dage
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jxjwealthy333

I am a reverse engineer. I know about assmembly and c++. I had developed ethereum miner using opencl. If you trust me, i will do my best. best regard.

€5555 EUR in 30 dage
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