Tapped Power Line Protection Engineering project

Educational Project: Complete Hardware and Software PandC Engineering Package for Tapped Power Line Protection IEC 61850 and Hardware Specifications Project Overview We are seeking an experienced Protection and Control (P&C) Design Engineer or Power Systems Developer to create a comprehensive, highly detailed educational engineering package for a Tapped Power Line Protection System. This is an instructional project aimed at college students (undergraduate electrical engineering/computer engineering level). Every deliverable must not only provide functional code, calculations, and hardware specifications, but must also explicitly explain WHAT is being done, WHY it is necessary, HOW it works under the hood, and WHAT NOT TO DO (common design mistakes and pitfalls). Ultimate Goal - The Protection Architecture Playbook: Crucially, the final deliverable must function as a universal "Playbook" or step-by-step algorithm. As a result of reading and following this project, the student must be able to learn the exact step-by-step instructions to develop any protection plan architecture entirely on their own from scratch. Educational Requirements (Applies to ALL Deliverables) For every technical document, script, or calculation provided in this project, you must structure the content to include: WHAT: Clear definition of the concept, component, or code function. WHY: The fundamental engineering reason, theory, or standard (IEEE/IEC/NEC) driving the choice. HOW: Step-by-step technical implementation instructions or mathematical derivation that a student can follow. WHAT NOT TO DO: Common industry mistakes, dangerous practices, code bugs, or sizing errors, along with an explanation of why they fail. Detailed Key Scope and Deliverables 1. The Universal Protection Architecture Playbook (The Core Algorithm) The Playbook: Create a step-by-step, generalized instruction manual on how to look at a blank single-line diagram and develop a full protection architecture. Educational Focus: This must teach the student the exact sequence of operations to follow (e.g., Step 1: Identify zones of protection; Step 2: Select instrument transformers; Step 3: Define protective relay functions; Step 4: Map communication architecture). It must be reusable for any future project. 2. Primary and Secondary Hardware Specifications & Guide Hardware Selection: Specify Standalone Merging Units (SAMU), High-Speed Tripping (HST) solid-state output modules, and IEEE 1588 PTP Grandmaster clock hardware for the tap line example. Schematics & Calculations: Provide 3-line AC/DC schematics, CT/PT ratio selection, and CT knee-point voltage calculation sheets (Vk > 20 * Ict). Educational Focus: Explain how CT saturation distorts secondary current waves, why standard electromechanical relays are too slow for fast trip budgets, and what happens if CT polarities are wired backward. 3. Physical Cabling and Tap Sizing Calculations Tap Calculations: Perform conductor thermal withstand (I^2 * t) and voltage drop calculations for the tap line per NEC 240.21 tap rules. Process Bus Topology: Specify fiber optic process bus topology using Parallel Redundancy Protocol (PRP dual-redundant LAN A / LAN B architecture with LC-Duplex connectors). Educational Focus: Detail why tap conductors without primary overcurrent protection at the point of supply risk cataclysmic melting, and why mixing PRP networks on unmanaged switches causes network loops. 4. IEC 61850 System Configuration (.scd File Generator) SCD Generator: Write a clean Python script to programmatically output a valid Substation Configuration Description (.scd) file containing Substation, Communication, GSE, SMV, and IED structures. Educational Focus: Break down the XML hierarchy of SCL files. Explain why GOOSE APPIDs and VLAN priorities (Priority 4) are critical, and why treating GOOSE traffic like standard HTTP/TCP traffic leads to unpredictable packet delays. 5. Distance Protection Engine (ANSI 21) with Infeed Logic Relay Algorithm: Implement a real-time distance protection script in Python or C++ featuring dynamic fault infeed ratio compensation: Z_true = Z_apparent / (1 + (I_infeed / I_tap)) Inrush Restraint: Integrate 2nd harmonic (120 Hz) restraint to prevent false trips during transformer/line inrush. Educational Focus: Explain why downstream current infeed tricks a standard distance relay into underreaching (perceiving the fault as further away than it is), and why tripping on inrush current without harmonic checks causes immediate transformer energization failures. 6. Real-Time OS Tuning and Automation Script Linux Scripting: Deliver a fully commented bash configuration script for PREEMPT_RT Linux to isolate CPU cores (isolcpus), set real-time process priorities (SCHED_FIFO 99), optimize network ring buffers, and lock ptp4l microsecond clock sync. Educational Focus: Explain what OS context switching and kernel preemption are, why standard Linux causes millisecond timing jitter, and why running real-time relay threads on shared unisolated CPU cores will cause trip latency budget failures. 7. Automated COMTRADE PyTest Harness and FAT Plan Test Automation: Develop a Python PyTest suite to parse IEEE C37.111 COMTRADE files and run automated fault injection sweeps. Provide a Factory Acceptance Test (FAT) procedure matrix. Educational Focus: Explain how binary COMTRADE files store sampled analog data, how to verify trip timing programmatically, and why relying exclusively on manual button-push testing is inadequate for complex digital substations. Acceptance Criteria (Definition of Done) Criterion 1 (Universal Playbook Usability): The documentation must successfully serve as a generalized, step-by-step instruction manual that allows a student to create a brand-new protection plan architecture from scratch. Criterion 2 (Educational Clarity): All documentation and code comments are clear, well-structured, and fully accessible to a college engineering student. Every section contains explicit "What, Why, How, and What NOT to do" notes. Criterion 3 (End-to-End Latency Target): The execution path—from Sampled Value packet intake to GOOSE trip publication—is proven to execute in <= 3.0 ms. Criterion 4 (Hardware & Code Validation): All calculation spreadsheets are fully derived and verified. All Python scripts (.scd generator, COMTRADE test bench, relay algorithm) run error-free out of the box. Criterion 5 (Infeed & Restraint Verification): The ANSI 21 algorithm correctly computes true fault distance despite varying downstream infeed ratios and refrains from tripping when 2nd harmonic content exceeds 15%. Required Skills and Qualifications Domain Expertise: Power System Protection and Control (P&C), Substation Automation, CT/PT sizing, and NEC code compliance. Teaching / Technical Writing Ability: Ability to explain complex electrical and software engineering concepts simply and translate them into repeatable, step-by-step algorithms. Standards: IEC 61850 (8-1 GOOSE, 9-2 SV, SCL/SCD), IEEE C37.111 (COMTRADE), IEEE 1588 PTP, ANSI protection functions (21, 50/51, 87). Software: Python 3 (numpy, pytest, lxml) or C++ (C++17/20), Linux PREEMPT_RT kernel tuning, Wireshark packet analysis. How to Apply Please submit your proposal including: Examples of technical writing, educational engineering tutorials, or P&C software projects you have created. Your proposed fixed-price breakdown by milestone, along with an estimated completion timeline.

Project ID: 40670828