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128Bit eFuse OTP IP Design

Subject:128bit eFuse OTP IP design

Problem statement: creating a convenable circuit that satisfied these specifications

– Supply voltage: VDD=2.2V – VIO=5.5VTemperature:-40C 25 C to 125C

Operating Mode :Program/Program Verify-Read/Read Program.

–Program Verify Read:10k (PVR Mode)

– Read Mode :5k {Read_Programmed Cell& Read_Uprogrammed Cell

– Current :<100uA. (Decreasing current from 168.4uA to 100uA

– checking the sensing resistance and read current

About Sensing resistance : Lower than 10K(PVR Mode), Lower than 5K(Read Mode), at all corner simulation

About Read Current: Lower than 100uA at all corner

original circuits (Block diagram) read current maximum value is 168.4uA, its over limitation

creating a convenable circuit (Block diagram) that make the current smaller than 100uA.

Expected result: Suitable block diagram have to be find out by modifying the above simulation circuits based on the requirements.

Færdigheder: Semiconductor, Kredsløbs Design, Elektronik

Om klienten:
( 0 bedømmelser ) Changwon, Korea, Republic of

Projekt ID: #34268576

Tildelt til:

bouzayeniabdelwa

As an Electro-mechanical Engineer, I bid on your project because I have the expertise and experience to provide high quality work. I can achieve the results that you are asking for. So , respond to the offer so that we Flere

$6 USD / time
(7 bedømmelser)
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