Lukket

Development of CCSDS based Telemetry Encoder on FPGA - open to bidding

Design and development of CCSDS based Telemetry Encoder on FPGA using Matlab system generator to generate VHDL coding, for satellite applications.

The project will comprise of three phases.

First phase will be the know how development of CCSDS Packet TM encoding Standard.

The second phase will be the implementation of all layers of standard on FPGA using Matlab system generator to generate VHDL coding. Each layer will be implemented as a separate module and simulation will be performed.

Finally all the modules will be integrated as a system in the third phase of the project. Complete working TM Encoder will be demonstrated on FPGA kit

FPGA not needed

Færdigheder: Projekt Ledelse

Se mere: packet design, vhdl fpga, open layers, fpga vhdl, design simulation project, coding matlab, satellite design, matlab development, project development phase, simulation based, vhdl project matlab, fpga design, project based matlab, fpga implementation matlab, matlab phase system, matlab based, project simulation using, open project management, matlab project development, project matlab simulation, matlab open, fpga matlab project, fpga development, matlab development project, matlab based project

Om arbejdsgiveren:
( 0 bedømmelser ) wah cantt, Pakistan

Projekt-ID: #5982559