I'm based in Ahmedabad, India. This project is related to lightweight cipher, cryptography. I have attached a pdf containing information relevant to this project which can be found in section 3.1 of uploaded pdf (round-based based architecture of PRESENT-80).
The code has already been developed and I'm getting the proper results as well. But I want to build a clock based design so that I can perform power analysis on it. Need the code properly working in two days.
I looking for a Clock based implementation on existing design
Language used : VHDL