FPGA DMA Firmware Development

$30-250 AUD

Closed

Posted 7 days ago

$30-250 AUD

Paid on delivery

I need new DMA firmware developed for an FPGA. Requirements: - Expertise in FPGA development - Experience with DMA and firmware design - Proficiency in relevant programming languages (like VHDL or Verilog) Ideal Skills: - FPGA architecture knowledge - Strong debugging and problem-solving skills - Previous DMA firmware projects experience No strict deadline for completion. Looking for quality work.

Firmware Development

FPGA Development

Project ID: 40589281

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3 proposals

Remote project

Active 2 days ago

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3 freelancers are bidding on average $413 AUD for this job

@ysy19950112

Hello, I am interested in your FPGA DMA firmware project. I have more than 13 years of professional FPGA development experience at DESY, using Verilog and VHDL for PCIe, DMA, DDR memory, data-acquisition, high-speed data-flow, and hardware-software integration systems. My experience includes DMA data-path design, FIFO and buffering architectures, flow control and backpressure, register interfaces, interrupt handling, clock-domain crossing, RTL simulation, timing analysis, and hardware debugging. My approach would be to: 1. Define the DMA data path, interfaces, transfer direction, buffering strategy, clock domains, throughput targets, and performance requirements. 2. Design a modular DMA engine architecture together with its control/status register interface. 3. Implement the RTL and simulation testbench. 4. Verify DMA transfers under normal operation, boundary conditions, backpressure, reset recovery, and error scenarios. 5. Integrate the design into the existing FPGA project and provide documentation. To estimate the scope accurately, could you please confirm the FPGA family/board, DMA interface type, transfer direction, DDR involvement, required throughput, and whether an existing PCIe endpoint or host driver is already available? I would be glad to review the current architecture and propose a reliable implementation plan. Best regards, Bin Yang

$550 AUD in 30 days

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@FPGAengr2026

Hi , I bring over 19 years of experience in embedded firmware and hardware engineering, with specialized expertise in FPGA and RTL design. My skillset directly aligns with the requirements of this project: HDL Proficiency: Advanced expertise in VHDL, Verilog, and SystemVerilog, enabling precise and efficient RTL coding. FPGA Tools: Extensive hands-on experience with Altera Quartus for synthesis, place-and-route, and FPGA configuration. Verification & Debugging: Skilled in Questasim for simulation, waveform analysis, and testbench creation to ensure robust verification. DMA & DSP Background: Prior work on DMA-based data pipelines and DSP firmware, ensuring optimized throughput and minimal latency. Problem-Solving: Proven ability to debug complex timing, resource, and integration issues in FPGA systems. Deliverables Complete DMA firmware module implemented in HDL. Simulation testbenches for functional and timing verification. Documentation covering architecture, design decisions, and usage guidelines. Optional integration support for system-level testing and deployment. Why I’m a Strong Fit My combination of HDL expertise, FPGA toolchain mastery, and prior DMA project experience ensures I can deliver a high-performance, reliable solution. I not only provide implementation but also thorough verification, reducing risk and ensuring smooth integration into your system.

$140 AUD in 10 days