The project concerns refactoring of a 4 chip (128K x 8) (HM62128) SRAM custom memory card into a 1 chip (256k x 16) (CY7C1041) SRAM card.
The project consist in writing the right PLD ecuations for WinCupl in order to obtain the right JEDEC file to program a PALCE16V8. The PAL16V8 will drive the SRAM signals (A17, WE, CE, OE, BLE, BHE) of a 4Mbit (256Kx16) SRAM from signals driving 4 (128K x 8) SRAM chips.
I will provide:
1. the schematics of original 4 chip memory card and of the new designed 1 chip memory card
You will provide:
1. the ecuations in order to get the JEDEC file to burn into PAL in order to synthesis the driving signals of (256K x 16) SRAM off signals driving the original 4 chip (128k x 8) chips
2. eventually propose corrections of the target schematics.
The target prototype is already done. I have a PLD burner and I can test the results right away on destination appliance,
I could provide Logic Analysis diagrams of the in-situ tests.
The payment only when the new replacement board works as is expected to.
You need experience in PLD programming and in SRAM memory projects
4 freelancers are bidding on average $194 for this job
Electronics Engineer (B.Sc.), have experience with PAL devices, SRAM interfaces, and memory control logic. Please see more details in Private Message. Thank you.