I gang

Wincupl PLD ecuations for SRAM driving signals

The project concerns refactoring of a 4 chip (128K x 8) (HM62128) SRAM custom memory card into a 1 chip (256k x 16) (CY7C1041) SRAM card.

The project consist in writing the right PLD ecuations for WinCupl in order to obtain the right JEDEC file to program a PALCE16V8. The PAL16V8 will drive the SRAM signals (A17, WE, CE, OE, BLE, BHE) of a 4Mbit (256Kx16) SRAM from signals driving 4 (128K x 8) SRAM chips.

I will provide:

1. the schematics of original 4 chip memory card and of the new designed 1 chip memory card

You will provide:

1. the ecuations in order to get the JEDEC file to burn into PAL in order to synthesis the driving signals of (256K x 16) SRAM off signals driving the original 4 chip (128k x 8) chips

2. eventually propose corrections of the target schematics.

The target prototype is already done. I have a PLD burner and I can test the results right away on destination appliance,

I could provide Logic Analysis diagrams of the in-situ tests.

The payment only when the new replacement board works as is expected to.

You need experience in PLD programming and in SRAM memory projects

Færdigheder: Elektrisk Ingeniørarbejde, Elektronik

Se mere: wincupl, pld wincupl, wincupl projects, sram pld, wincupl pld, sram card, writing driving test, test board, synthesis writing, synthesis in writing, electrical and electronics engineering, driving writing test, board prototype, ble engineering, programming pal16v8 wincupl, wincupl signals, signals wincupl, pal16v8 programming, driving sram, hm62128, engineering schematics, synthesis, situ, signals, PLD

Om arbejdsgiveren:
( 2 bedømmelser ) EAUBONNE, France

Projekt-ID: #973221

Tildelt til:

TopGunPk

Hi. Please check PMB.

$115 USD in 2 dage
(4 bedømmelser)
4.3

4 freelancere byder i gennemsnit $194 for dette job

MIKY4227

20+ years of WORK EXPERIENCE with complex Xlinix or Altera CPLD FPGAs or ASICs, VHDL or Verilog, and associated EDA tools, including Mentor Graphics (simulation) Proficient in writing VHDL, developing VHDL test benche Mere

$250 USD in 5 dage
(14 bedømmelser)
4.8
yoramgr

Electronics Engineer (B.Sc.), have experience with PAL devices, SRAM interfaces, and memory control logic. Please see more details in Private Message. Thank you.

$300 USD in 7 dage
(0 bedømmelser)
0.0
StoneThrower

Please, take a look at the PM I sent you.

$110 USD in 2 dage
(0 bedømmelser)
0.0