FPGA based VHDL code of control system device, the design should be handwritten, not generating code.
The FPGA design must have the std logic data type of the inputs and the outputs and S-Fixed numbers of the entire control design.
10 freelancere byder i gennemsnit €144 på dette job
Hello, I'm an electrical engineer and expert in FPGA programming. I'm very interested in your project and hope to discuss on your project in detail via chat or call. Best regards Alexander
having more than 8 yrs of experience in vhdl verilog systemverilog design and verification. I can do this very well without any functional issues.
Hi Sir. I have rich experience on embedded system program including various Cyclone FPGA.I work on Quartus13.0 with VHDL. I would like to help your project and i'd like to discuss it in more details. Best regards.
Hi, I Think I can help you with this Project, I am a Nano- Engineer with experience in VHDL , I just have a question regarding the handwritten code, how could we test it ? Regards, Mohamed