Telemetry encoder on FPGA using VHDL language for Settalite - open to bidding

The project will comprise of three phases.

First phase will be the know how development of CCSDS Packet TM encoding Standard.

The second phase will be the implementation of all layers of standard on FPGA using the VHDL language. Each layer will be implemented as a separate module and simulation will be performed.

Finally all the modules will be integrated as a system in the third phase of the project. Complete working TM Encoder will be demonstrated on FPGA kit

Evner: Dataindførsel, Databehandling, Excel

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Om arbejdsgiveren:
( 0 bedømmelser ) Philippines

Projekt ID: #5996864

1 freelancer is bidding on average $155 for this job


Dear Hiring Manager, I am interested in the job you recently posted. I am a graduate of Computer Science, and am very familiar with Data Entry, MS office and Web Researching. I am hardworking, disciplined and have Flere

$155 USD in 3 dage
(1 bedømmelse)