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An PSK (BPSK, QPSK,8-PSK) modulator/ demodulator for the ARTIX7-200 FPGA is needed

A (PSK) modulator/ demodulator for the ARTIX7-200 platform is needed. This project is a mere test for the abilities of the bidder. Several Add-On projects will follow.

An PSK (BPSK, QPSK, OQPSK, 8-PSK) modulator/ demodulator for the ARTIX7-200 platform is needed.

The PSK modulator must have a sampling rate selection between 1ksps-400 MSPS,

The PSK demodulator must have a sampling rate selection between 1ksps-200 MSPS,(100 MSPS for BPSK)

The developer will develop a PSK (BPSK, QPSK,OQPSK,8-PSK) modulator/ demodulator core .

The demodulator core must perform all the carrier and clock recovery mechanisms (costas loop etc.)

The PSK modulator will be generate 12 bit I&Q signals and will feed the signals to the demodulator.

The Input to the modulator should be a PRBS sequence.

The output of the demodulator should be feed to the PRBS Sequence decoder.

( the demodulator should indicate a LOCK)

This project is a mere test for the abilities of the [login to view URL] are aware that this design can be realized by using Mathworks and Vivado HLS reference designs.

If the bidder is sucessfull, we will ask for;

A pulse shaping Filter,(TX,RX)

A Viterbi decoder(an existing one),

Sync Word Insertion, Detection,

Reduced Rate FFT,

BER count, SNR estimation blocks to be added by the bidder to the existing project for an extra fee.

Evner: C programmering, Elektrisk Ingeniørarbejde, Elektronik, Microcontroller, Verilog / VHDL

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Om arbejdsgiveren:
( 0 bedømmelser ) ANKARA, Turkey

Projekt ID: #16479332

Tildelt til:


Dear Sir! I am very interesting in your job. Actually, before i already many worked on electronic device development and i have a large experience in this area. Please feel free to check my portfolio and this is my Flere

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17 freelancere byder i gennemsnit $666 på dette job

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Hello I can help you with your task please check my reviews for more information about me

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Dear rd13new, Thank you for inviting us to bid on your project. We have highly experienced RTL and FPGA engineers with over 14 years of development and verification experience in WiFi systems and communication domai Flere

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Hi Thanks for inviting me to bid. I am working on RTL/FPGA design by more than 4 years. Infact I have designed plenty of algorithms but be open I never came across design of bpsk qpsk. Although I desire to work on y Flere

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Hello I have experience in FPGA based encoding / decoding for OFDM and PAM systems. I am interested in this project and happy to discuss and proceed. Thanks VJ

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I am experienced in fpga ip core development and had worked on artix7

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hi , i can develop this for you, i am expert in this field and done many similar projects, kindly reply me for further discussion, Thank you

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i've involved in a IF chip (which is succesfully taped out)before, so i'm quite familiar with SDR. as for this task,i can give you a brief design diagram of QPSK right now. [login to view URL] clock signal enable,then module PHASE0 Flere

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I am a Computer Engineer (electronics, programming) and an Amateur Radio operator, and thus I am familiar with the various PSK modes, as well as software defined radio and electronics.

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1. PSK modulation performed for instance with PLL, muxes to switch between frequencies, DAC, NCO 2. Demodulation: Filters, amplifiers in the main path, DAC, carrier recovery, timing recovery etc Relevant Skills and Flere

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