Lukket

develop a CAD tool that can read in the “logical RAMs” in each circuit of a benchmark set, and output a set of “physical RAMs” that can implement the logical RAMs for each circuit

You will develop a CAD tool that can read in the “logical RAMs” in each circuit of a benchmark set, and output a set of “physical RAMs” that can implement the logical RAMs for each circuit. Your tool should be able to target FPGAs with up to 3 types of physical RAMs (which may be 3 different block RAMs, or 2 block RAMs and “LUTRAM” created by using a logic block as RAM). Your CAD tool should attempt to find a solution that minimizes the area of the FPGA needed to fit each benchmark circuit.

Evner: C programmering, C++ Programmering, CAD / CAM, FPGA

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Om arbejdsgiveren:
( 0 bedømmelser ) Kolkata, India

Projekt ID: #18132763

1 freelancer byder i gennemsnit ₹7777 på dette job

₹7777 INR in 3 dage
(0 bedømmelser)
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