Vlsi verilog fpga asicJobs

Filtrér

Mine seneste søgninger
Filtrer ved:
Budget
til
til
til
Slags
Evner
Sprog
    Job-status
    4,003 vlsi verilog fpga asic jobs fundet, i prisklassen EUR
    Verilog project FSM Udløbet left

    Verilog project FSM Verilog project FSM Verilog project FSM

    €9 / hr (Avg Bid)
    €9 / hr Gns Bud
    1 bud

    Implementation of Fractional order Integer/ Derivative Using GL algorithm based VHDL on FPGA. simple code which i need.

    €103 (Avg Bid)
    €103 Gns Bud
    3 bud

    I require a working code in verilog/VHDL/C for an FIR Filter to be implemented on an Altera FPGA

    €112 (Avg Bid)
    €112 Gns Bud
    9 bud
    verilog design -- 2 5 dage left
    VERIFICERET

    I need to implement system verilog code design you will design a bit movement block. This block works with a 32 bit read and write interface, and can move data starting at any bit location. The block has two interfaces. One to read and write registers, another for the block to read and write memory, and a third interface for some status and completion information. The interface is defined with t...

    €43 (Avg Bid)
    €43 Gns Bud
    6 bud
    verilog design 5 dage left
    VERIFICERET

    I need to implement system verilog code design you will design a bit movement block. This block works with a 32 bit read and write interface, and can move data starting at any bit location. The block has two interfaces. One to read and write registers, another for the block to read and write memory, and a third interface for some status and completion information. The interface is defined with t...

    €24 (Avg Bid)
    €24 Gns Bud
    4 bud

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : fix neural network *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in training. *All of this should be printed in the ...

    €42 (Avg Bid)
    €42 Gns Bud
    4 bud

    We have a Quartus software license and two Arria 10 boards (Terasic Han Platform). We want to give video input to one of the FPGAs through USB-C port and transmit it to the other board with one or multiple serial lines. At the other board, we want to get this video as output from the USB-C port again. We have XTS-FMC Boards for connection between the two FPGAs. We need a highly experienced FPGA ...

    €1008 (Avg Bid)
    €1008 Gns Bud
    13 bud

    I need someone to hello work on a VLSI design using Cadence Virtuso. Needs to be experienced. I will give details on chat. Please bid only if you can do Please, Don’t include the adder. In the published paper, there is two types of energy used as input, in my project I’m using only piezo, so just ignore the adder part. I am adding a picture which can help

    €19 (Avg Bid)
    €19 Gns Bud
    2 bud

    I need someone to hello work on a VLSI design using mentor graphics or Cadence Virtuso. Needs to be experienced. I will give details on chat. Please bid only if you can do Please, Don’t include the adder. In the published paper, there is two types of energy used as input, in my project I’m using only piezo, so just ignore the adder part. I am adding a picture which can help

    €13 (Avg Bid)
    €13 Gns Bud
    1 bud

    About us All-in-one solution for market data, order interface, order management and risk controls – at FPGA network card Level. Support for multiple trading applications using a single interface to the exchange, yet providing individual view of the order books for each application. Many solutions that are currently available either crunch the speed tests or concentrate on functionality...

    €582 (Avg Bid)
    Lokal
    €582 Gns Bud
    4 bud

    I am currently using Altera DE2-115 FPGA board to configure it using Quartus 17 lite edition software and write the code in VHDL. We have to use QSYS, and NIOS II for Eclipse to write a program in C and to run the board. I am seeking some help in building this mini thing.

    €25 (Avg Bid)
    €25 Gns Bud
    2 bud

    We are seeking 1 FPGA Design Engineer for our new product development. FPGA Design Engineer Responsibilities: • Completing implementation in RTL • Ensuring robust and complete timing constraints • Optimizing FPGA code to balance performance, area, power, complexity and timing • Determining and executing development, integration, bring-up and test plans. • Working closely ...

    €35 / hr (Avg Bid)
    €35 / hr Gns Bud
    20 bud

    I need someone to hello work on a VLSI design using mentor graphics or Cadence Virtuso. Needs to be experienced. I will give details on chat. Please bid only if you can do Please, Don’t include the adder. In the published paper, there is two types of energy used as input, in my project I’m using only piezo, so just ignore the adder part. I am adding a picture which can help

    €25 (Avg Bid)
    €25 Gns Bud
    2 bud

    I am looking for VLSI expert now. If you can do it, we can discuss in details on chat.

    €81 (Avg Bid)
    €81 Gns Bud
    4 bud

    Implementation of Fractional-order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please, please.

    €45 (Avg Bid)
    €45 Gns Bud
    5 bud

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    €24 (Avg Bid)
    €24 Gns Bud
    2 bud
    FPGA Engineer Udløbet left

    For a Software Defined Radio module we are looking for a senior FPGA engineer. - Process all received data - Filter data for results - Etcetera To process and filter the data on the modules and possible FPGA within a specific SDR device. You will work with persons out of our team. You solve and test the issues they implement. Budget $800

    €881 (Avg Bid)
    €881 Gns Bud
    14 bud

    BladeRF specialist is needed that has experience with SDR (Software Defined Radio). We would like to set certain functions in the BladeRF: - Receiver (capture data) - Transmitter (page request) - Process all received data - Filter data for results - Multi bands simultaneously - Software define directional radio/antennas - Software define reach/width radio/antennas - Etcetera Require solution to ...

    €826 (Avg Bid)
    €826 Gns Bud
    9 bud
    Eye pupil tracking Udløbet left

    I would like to do project in human eye pupil tracking system for video sequence using Verilog in Xilinx spartan 6 FPGA. Here with attached my equirements Requirements: 1. Find the pupil center coordinates and radius for various eye's. 2. Coordinates should be constant intervals while tracking. 3. Only video sequence to be used.... Not for image. Kindly send me possibility of above …...

    €63 (Avg Bid)
    €63 Gns Bud
    2 bud

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    €18 / hr (Avg Bid)
    €18 / hr Gns Bud
    1 bud
    Program a project Udløbet left

    I am a worker for a software company. I am currently using Altera DE2-115 FPGA board to configure it using Quartus software. We have to use NIOS II processor, QSYS, and Eclipse to write a program and to run the board. I am seeking some help in building this mini thing.

    €15 / hr (Avg Bid)
    €15 / hr Gns Bud
    14 bud

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    €57 (Avg Bid)
    €57 Gns Bud
    4 bud

    i need a 8-bit comparator characterizing overdrive, to be implemented on FPGA, using Verilog also I need the constrains file

    €20 (Avg Bid)
    €20 Gns Bud
    9 bud
    €23 Gns Bud
    3 bud
    FPGA Board Expert Udløbet left

    An expert on FPGA Board should bid only, showing a sample work will be an advantages

    €214 (Avg Bid)
    €214 Gns Bud
    8 bud

    I am looking for electronic engineers having expertise in different microcontrollers like FPGA, Raspberry Pi, Arduino, PIC, ESP and many others having expertise in programming. I will share details of projects in chat

    €19 (Avg Bid)
    €19 Gns Bud
    19 bud

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    €3 / hr (Avg Bid)
    €3 / hr Gns Bud
    5 bud

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    €21 (Avg Bid)
    €21 Gns Bud
    7 bud

    I'm currently working on a project titled as "VLSI Design of Vibration based Energy Harvesting Circuit for Hearing Aid Device", would like to get help from the professionals like you guys. I have already worked on my construction of layout on Cadence P-Spice software, needing help to turn it in Mentor Graphics (Pyxis Design Manager) and get a layout out of it. Should contain : -Sc...

    €56 (Avg Bid)
    €56 Gns Bud
    4 bud
    FPGA/VHDL/Verilog Udløbet left

    Looking for implementation of a Ethernet Tester, generating and analyzing Ethernet traffic at 1G and 10G. More details on PM. J

    €11 / hr (Avg Bid)
    €11 / hr Gns Bud
    25 bud

    We need to develop a digital multiplier circuit and we need to test the circuit design, Implement it in software environment and simulate the circuit functionality. This is going to be part of a bigger project (ARM IP Core, DSP CPU) and we may need to compare the circuit functionality with some other recommended multiplier in terms of speed and foot print.

    €120 (Avg Bid)
    €120 Gns Bud
    20 bud

    we need expierenced partner to build fpga mining software

    €18 / hr (Avg Bid)
    €18 / hr Gns Bud
    11 bud

    hardware architecture of Variational Mode Decomposition on an FPGA

    €102 (Avg Bid)
    €102 Gns Bud
    4 bud

    Please read carefully. You need to fix my code. I will sent to you in messages my project. Here is project description: The brightness measurement with help of PMODALS sensor ([log ind for at se URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([log ind for at se URL]) is to be used, which takes over the control. The re...

    €475 (Avg Bid)
    €475 Gns Bud
    14 bud
    FPGA Board Udløbet left

    An expert on FPGA Board should bid only, showing a sample work will be an advantages

    €65 (Avg Bid)
    €65 Gns Bud
    12 bud
    Camera development Udløbet left

    Opal Kelly front panel, C++, Verilog, XEM6010. Must have experience with Opal Kelly front panel, since this project will be similar with the EVB100X-DEV. Same concept, but different sensor.

    €2018 (Avg Bid)
    €2018 Gns Bud
    20 bud

    Need expert labview for fpga control of an instrument

    €45 / hr (Avg Bid)
    €45 / hr Gns Bud
    5 bud
    FPGA project Udløbet left

    I am looking for FPGA expert..

    €162 (Avg Bid)
    €162 Gns Bud
    6 bud
    GPS implementation Udløbet left

    first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PCB of the board you have. U3 is ...

    €306 (Avg Bid)
    €306 Gns Bud
    5 bud

    Im looking for personnel to work on FPGA program in Singapore ,must be able to read current program or create an new program as required .Any one interested please contact me

    €300 (Avg Bid)
    €300 Gns Bud
    15 bud

    I need a line scan CMOS sensor (pixel size 14 micron X 200 microns) capable of line scan at a rate of 80KHz and output the data through ethernet to Xilinx FPGA.

    €476 (Avg Bid)
    €476 Gns Bud
    4 bud

    Hello, We are looking for a FPGA electric engineer who can help us engineer a FPGA board, customize an existing board. Preferable who can also develop in Python and C to connect the FPGA board with a RaspberryPi, and develop programs on both boards. You will receive project information later.

    €1049 (Avg Bid)
    €1049 Gns Bud
    25 bud

    I need animated video with storyline or concept for promoting our VLSI institute in facebook and Youtube. This should be with audio . Sample : [log ind for at se URL] Note : Sample is only for reference .

    €63 (Avg Bid)
    €63 Gns Bud
    8 bud
    build opencl code Udløbet left

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : Build a deep neural network using some of approximate MAC UNIT, *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in traini...

    €290 (Avg Bid)
    €290 Gns Bud
    10 bud
    VLSI Designer Udløbet left

    I need a designer, who can prepare a diagram for my IOT modules

    €15 (Avg Bid)
    €15 Gns Bud
    8 bud

    Hi Rajagopal S., I noticed your profile and would like to offer you my project. We can discuss any details over chat. The brightness measurement with help of PMODALS sensor ([log ind for at se URL] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([log ind for at se URL]) is to be used, which takes over the control. The res...

    €201 (Avg Bid)
    €201 Gns Bud
    1 bud

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : Build a deep neural network using some of approximate MAC UNIT, *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in traini...

    €158 (Avg Bid)
    €158 Gns Bud
    12 bud

    First task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop The second part of the project task is to populate the ADC and final amplifier stages on the PMU PCB, together with power...

    €182 (Avg Bid)
    €182 Gns Bud
    4 bud
    Research help -- 3 Udløbet left

    Hello, this is the task: "first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PC...

    €287 (Avg Bid)
    €287 Gns Bud
    8 bud

    Hi. I have a Terasic De1SoC and would like to learn how to use it. I am completely knew and have seen content from a similar project and interested on these topics About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design Implementing various encryption and decrypt algorithms SystemVerilog VMM Methodology OVM Methodology UVM Methodology I have C programming background

    €30 / hr (Avg Bid)
    €30 / hr Gns Bud
    1 bud