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    4,001 fpga vhdl verilog jobs fundet, i prisklassen EUR
    Verilog project FSM Udløbet left

    Verilog project FSM Verilog project FSM Verilog project FSM

    €10 / hr (Avg Bid)
    €10 / hr Gns Bud
    1 bud

    I would like to implement a calculator which takes inputs from the ps2 keyboard and displays them on 7 segment.

    €40 (Avg Bid)
    €40 Gns Bud
    4 bud
    ASIC FPGA Firmware development 6 dage left
    VERIFICERET

    We are looking for developers/coders specialized in cryptos and blockchain for a project of firmware development. We would like to get a firmware to overclock this mining hardware i.e. graphic cards (GPU) RX580 8Go. Which are the maximum hashrates performances you can get?

    €2128 (Avg Bid)
    €2128 Gns Bud
    1 bud

    ...and 4K horizantal resolutions. During line scan mode we need to reach 25 kHz. Area scan speed can be any 10-30 fps. We will use OS08A20 CMOS image sensor and Altera or Xlinx FPGA. As the milesotones: 1. Creation of camera controller to achive area scan and high speed line scan functions. 2. Sending image over USB 3.0 or Gigabit ethernet 3. Testing

    €1 / hr (Avg Bid)
    €1 / hr Gns Bud
    1 bud

    ...and 4K horizantal resolutions. During line scan mode we need to reach 25 kHz. Area scan speed can be any 10-30 fps. We will use OS08A20 CMOS image sensor and Altera or Xlinx FPGA. As the milesotones: 1. Creation of camera controller to achive area scan and high speed line scan functions. 2. Sending image over USB 3.0 or Gigabit ethernet 3. Testing

    €1 / hr (Avg Bid)
    €1 / hr Gns Bud
    1 bud

    ...and 4K horizantal resolutions. During line scan mode we need to reach 25 kHz. Area scan speed can be any 10-30 fps. We will use OS08A20 CMOS image sensor and Altera or Xlinx FPGA. As the milesotones: 1. Creation of camera controller to achive area scan and high speed line scan functions. 2. Sending image over USB 3.0 or Gigabit ethernet 3. Testing

    €1 / hr (Avg Bid)
    €1 / hr Gns Bud
    1 bud

    Dear Muhammad, I am looking for an Hardware Engineer having experience with FPGA/ASIC in the Ethernet area. We want to build and develop a product and it looks that you would be able to do that. More details about the project I would share in the chat.

    €9 (Avg Bid)
    €9 Gns Bud
    1 bud
    Online Tutor Embedded C/C++ 3 dage left
    VERIFICERET

    Tutor/Mentor Required(Online): -- Good knowledge of Embedded c/c++ and VHDL -- Good Experience with Renesas Microcontrollers and e2 Studio

    €7 / hr (Avg Bid)
    €7 / hr Gns Bud
    9 bud

    ..."MagicNumber(2 bytes), Length(2 bytes), Payload(252 bytes)" 0xAA 0x55 , 0x00 0xFC , rest 252 bytes data 3. Main clock for FPGA is 50MHz. 4. Data read from FIFO is at main clock (50MHz). 5. Clock cross over should be handled without any data lose. 6. Timing contraints should be properly mentioned

    €97 (Avg Bid)
    €97 Gns Bud
    1 bud

    Muktiplexer of 2 to 1 in vhdl using tje software xillinix

    €18 (Avg Bid)
    €18 Gns Bud
    3 bud

    more details will be given in the chat only serious expert and my maximum budget for this task is $100

    €49 (Avg Bid)
    €49 Gns Bud
    23 bud

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €911 (Avg Bid)
    €911 Gns Bud
    4 bud
    PCIE FPGA PCB Design Revision 1 dag left
    VERIFICERET

    We require a PCB designer familiar with gerber files and PCI Express FPGA designs. We have a reference design and we require the design simplifying so the board only provides the functions required to run our software as effective as possible.

    €204 (Avg Bid)
    €204 Gns Bud
    11 bud

    hello, everyone i would like to hire fpga and verilog experts if you have experience on fpga, please bid on my project. thanks.

    €465 (Avg Bid)
    €465 Gns Bud
    20 bud
    Essay Writing Udløbet left

    Hardw...artificial neural networks, machine vision and other machine learning algorithms for robotics, internet of things and other data-intensive or sensor-driven tasks. • SW, GPU, FPGA, ASICs, Heterogeneous computing • Examples: • Virtual machines and environments for NN acceleration • Nvidia Volta/Tesla application for NN acceleration Es

    €48 (Avg Bid)
    €48 Gns Bud
    50 bud

    The task is to develop the implementation of the keccak256 algorithm for FPGA XILINX xcku035-1ffva1156c. Verilog / VHDL development language (Xilinx Vivado Design Suite) Functional check on any available board. Requirements for implementation: 1. The algorithm should work in accordance with [log ind for at se URL]; a. The source can

    €549 (Avg Bid)
    €549 Gns Bud
    3 bud

    ...for someone who can design a FPGA based x16r miner to mine Cuckoo Cycle based coins like rvn. The design should be adaptable for possible changes in the x16r algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with

    €5031 (Avg Bid)
    NDA
    €5031 Gns Bud
    17 bud
    find fpga projects Udløbet left

    Hi somebody needed for find fpga (verilog-vhdl) remote projects I paid 20% commission for each project

    €406 (Avg Bid)
    €406 Gns Bud
    10 bud

    need report on vhdl of 4 bit alu

    €86 (Avg Bid)
    €86 Gns Bud
    23 bud

    Hi,eveyone.I need a signal processing coding for my work using altra quartus II and VHDL.

    €83 (Avg Bid)
    NDA
    €83 Gns Bud
    7 bud
    Matlab Codnig Udløbet left

    I need the matlab developer and verilog developer

    €549 (Avg Bid)
    €549 Gns Bud
    17 bud

    Hi, I need a quick prototype for an Artix-7 based fpga that makes a pcie to sd card controller (SD host controller/SD bus). Objective is to have a fpga card (working on pcie screamer) recognized as a SD/MMC card reader under windows, I need Windows to recognize/be able to install the windows built-in sd card drivers for the card. I don’t need it

    €377 (Avg Bid)
    €377 Gns Bud
    3 bud

    Arduino that can record signal data and playback the data. it will be inline. I have a FPGA and an LCD. I need to record the signals coming from the FPGA to the LCD and recreate the signal to display on the LCD

    €47 (Avg Bid)
    €47 Gns Bud
    8 bud

    I would like a board designed in Altium Designer, KiCAD or Eagle that is PIN compatible with the ZYBO Z7-20 board from diligent, but has only the essential circuitry required for RAM, Power, Jtag, and the CSI camera. Please and thank you.

    €13 - €22 / hr
    €13 - €22 / hr
    0 bud

    I would like a board designed in Altium Designer, KiCAD or Eagle that is PIN compatible with the ZYBO Z7-20 board from diligent, but has only the essential circuitry required for RAM, Power, Jtag, and the CSI camera. Please and thank you.

    €519 (Avg Bid)
    €519 Gns Bud
    26 bud

    Implementation of 4 bit alu in VHDL using the software Xillinix ISE I Need report on circuits diagrams, truth table, and simulations results the structure report should go by 1-introduction 2-block diagram 3-Technical Words 4-Implementations 5-Results 6-Conclusion

    €123 (Avg Bid)
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    6 bud

    GIVE ME SOME IDEAS ABOUT PROJECTS USING FPGA BOARD I need some ideas(NEARLY 10) for my projects by using [log ind for at se URL] is an electronics and communication engineering project.I need some new ideas. Give me an example idea for accepting the [log ind for at se URL] should use only fpga and some sensors only.

    €1771 (Avg Bid)
    €1771 Gns Bud
    9 bud

    hi, everyone i would like to hire fpga and verilog expert if you have experience on fpga, please bid. thanks.

    €456 (Avg Bid)
    €456 Gns Bud
    24 bud

    Hello I'm looking for a talented FPGA developer who have rich knowledge of C/C++, Python I have a machine using Huawei's FPGA used vu9p core and I am going to port x13bcd hash algorithm to this machine And I want at least 300mh/s with x13bcd but will increase double using x16R I am using Ubuntu and you can check your project via remote Other details

    €1047 (Avg Bid)
    €1047 Gns Bud
    14 bud
    fpga image fusion Udløbet left

    i want you to do project for medical image fusion of CT scan and MRI using xilinix fpga

    €214 (Avg Bid)
    €214 Gns Bud
    7 bud
    16-point FFT Udløbet left

    verilog code for radix-4 16 point fft

    €13 (Avg Bid)
    €13 Gns Bud
    8 bud
    FFT working in VHDL Udløbet left

    I want a VHDL code to achieve a N point FFT

    €121 (Avg Bid)
    €121 Gns Bud
    16 bud

    i want a verilog coding regarding radix-4 16 point FFT. so i need expert help.

    €14 (Avg Bid)
    €14 Gns Bud
    4 bud
    Trophy icon Explanation of VHDL code Udløbet left

    I have a VHDL code.. I need someone to explain that code in detail to me.. what stuff it is doing on board..

    €9 (Avg Bid)
    Garanteret
    €9
    0 indlæg

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €10406 (Avg Bid)
    €10406 Gns Bud
    2 bud

    Hi Ahmed M., Write VHDL code for frequency comparison on threshold base after the FFT_64 block in my code, the threshold will be defined by user through VIO or uart. The results should be verified on ILA in Hz. Also comment every line of code.

    €44 / hr (Avg Bid)
    €44 / hr Gns Bud
    1 bud

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €9117 (Avg Bid)
    €9117 Gns Bud
    1 bud

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €785 - €791
    €785 - €791
    0 bud

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €774 - €775
    €774 - €775
    0 bud

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €776 - €776
    €776 - €776
    0 bud

    Initial Milestone : Write VHDL code for frequency comparison on threshold base after the FFT_64 block in my code, the threshold will be defined by user through VIO or uart. The results should be verif on ILA

    €154 (Avg Bid)
    €154 Gns Bud
    1 bud

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €787 (Avg Bid)
    €787 Gns Bud
    3 bud

    ... Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest priority. Answer me those question--> You must --> have access to BCU1525? And Verilog experience? which Bitstream

    €646 - €775
    €646 - €775
    0 bud

    Hi Ahmed M., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I'm a friend of Alessandro that contact you for a mini ...Ahmed M., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I'm a friend of Alessandro that contact you for a mini project of VHDL

    €50 (Avg Bid)
    €50 Gns Bud
    1 bud

    I have a 4 layers PCB fully done in Alti...to connect a new EXP main connector to the FPGA. Some nets may be missing in schematics, you should manually add the net names to the schematics. Although the schematic need slight fix, the PCB's DRC is ok, no errror. The EXP connector is DIL 2x12 2.54mm pitch, where signals have to be connected to the FPGA..

    €158 (Avg Bid)
    €158 Gns Bud
    27 bud

    Hello, I have a set of ECG signal values in numeric form, I want to display them throu...want to display them through Xlinx code and send the same signal to network device through wifi. Please let me know if you can do it in 2 days. The code will not run on actual FPGA board, its just a simulation project. The code should run on xilinx ise software.

    €105 (Avg Bid)
    €105 Gns Bud
    2 bud

    FPGA XC6SLX25, Power source 12v. Connect PROM(at least 2 megabyte) and RAM(at least 100kilobyte) to FPGA and power

    €47 (Avg Bid)
    €47 Gns Bud
    6 bud
    FPGA project Udløbet left

    i need someone to take a FPGA and make it compatible with a MIPI LCD.

    €199 (Avg Bid)
    €199 Gns Bud
    2 bud