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    3,752 fpga vhdl verilog jobs fundet, i prisklassen EUR
    Verilog project FSM Udløbet left

    Verilog project FSM Verilog project FSM Verilog project FSM

    €10 / hr (Avg Bid)
    €10 / hr Gns Bud
    1 bud
    fpga develop 6 dage left

    program with fpga to control TCP data and flow.

    €989 (Avg Bid)
    €989 Gns Bud
    9 bud
    PRESENT-80 5 dage left

    Hi there! I'm based in Ahmedabad, India. This project is related to lightweight cipher, cryptography. I have attached a pdf containing information relevant to this project w...design so that I can perform power analysis on it. Need the code properly working in two days. I looking for a Clock based implementation on existing design Language used : VHDL

    €53 (Avg Bid)
    €53 Gns Bud
    5 bud

    Hi there! I'm based in Hyderabad, India. This project is related to cryptography. I have attached a pdf containing information relevant to this project which can be found...clock based design so that I can perform power analysis on it. Need the code properly working in two days. Note: Clock based implementation on existing design Language used : VHDL

    €26 (Avg Bid)
    €26 Gns Bud
    2 bud
    programing fpga 5 dage left

    programing fpga for mining ethereum

    €7473 (Avg Bid)
    €7473 Gns Bud
    17 bud

    In this project I need to optimize the code for Groestl miner VCU 1525 to smaller FPGA (Artix-7 XC7A200T). Groestl will be slightly modified and this modification will need to be reflected here. The optimal target speed is 50-70 MHs. (code [log ind for at se URL]) You'll need to adjust the mining program for control and run on

    €216 (Avg Bid)
    €216 Gns Bud
    6 bud

    Requirements: - Proficient in Verilog/VDHL and C/C++ - Experienced with Xilinx Vivado - Experienced in debugging on ILA/JTAG Preferred Qualifications: - Familiar with AXI interface - Familiar with wireless communication system VLNComm has several current working FPGA projects and one incomplete FPGA project in development on the topic of visible

    €3942 (Avg Bid)
    €3942 Gns Bud
    22 bud

    Науково-дослідний проект в галузі неруйнівного контролю. ____________________________________________________________ Scientific research project in the field of non-destructive testing.

    €341 (Avg Bid)
    €341 Gns Bud
    3 bud

    Problem statement: Use an Operating system driven FPGA/Aurdino/Rasberry/ARM(convinient one) hardware to transfer a PDF file to another device via Wi-Fi. Operating system is preferably Linux. It's preferable to have the smallest/ cheapest hardware. The hardware must have the option to integrate Wi-Fi and NFC modules.

    €162 (Avg Bid)
    €162 Gns Bud
    9 bud

    Hi there! I'm based in Hyderabad, India. This project is related to cryptography. I have attached a pdf containing information relevant to this project which can be ...individual modules are successfully executing but the final result doesn't appear which you can help me in debugging the same ) Note: Problem in debugging the code Language used : VHDL

    €138 (Avg Bid)
    €138 Gns Bud
    9 bud

    Please solve my problem, please teach the solution method and deliver the project file. This project is relevant to FPGA, Ubuntu. My problem is the following. =========================== I want to get image from Pcam 5C from Ubuntu running on ZYBO-Z7-20. First, I cloned this repository,([log ind for at se URL]) and tested pre-built

    €97 (Avg Bid)
    €97 Gns Bud
    2 bud

    I am the engineering director of VLNComm. We develop the visible light communication system. The system includes an FPGA part. We use Xilinx Vivado as our development platform and Xilinx all programmable SoC as our hardware platform. The project involves transmitter and receiver design. We have implemented 4-PAM (pulse amplitude modulation) and one

    €3997 (Avg Bid)
    €3997 Gns Bud
    26 bud

    Verilog expert required for task on Digital Systems Deadline 2 Days Budget 30 usd. Details will be shared with interesting bidders

    €57 (Avg Bid)
    €57 Gns Bud
    18 bud
    need expert on VHDL Udløbet left

    expert on VHDL is need for a project on digital thermostat. This is a simple task. expert only should bid

    €66 (Avg Bid)
    €66 Gns Bud
    20 bud

    ... Advance mining strategies 18. Different coins algorithm 19. Windows vs Linux 20. Alt coins mining 21. Exchanges, depths& liquidity 22. New coins and easy to mine coins 23. FPGA 24. Rigs maintenance 25. Pulling the plug 26. Profits strategy, [log ind for at se URL] 27. Basic wallets 28. Shapeshift and cryptonator , alt coins for popular coins -JON 29. Critical success

    €416 (Avg Bid)
    €416 Gns Bud
    39 bud

    build a communication block in VHDL at Xilinx environment

    €351 (Avg Bid)
    €351 Gns Bud
    14 bud
    PCB layout for SRAM Udløbet left

    Hi, I've bought this board: [log ind for at se URL] Here is the schematic: [log ind for at se URL] The problem I ...ly/2uYIH8H Here is the schematic: [log ind for at se URL] The problem I have is that this PCB board is too small to fit in my FPGA: [log ind for at se URL] So, I want the same PCB (4 layers) with the properly dimensions to fit in my FPGA.

    €40 (Avg Bid)
    €40 Gns Bud
    27 bud

    I need FPGA developer that able to interface LED rgb modules to display video from Raspberry Pi either via Ethernet or Serial protocol (let's call it API from Raspberry to FPGA display).

    €1188 (Avg Bid)
    €1188 Gns Bud
    15 bud

    Implement Communication VHDL Comm port on Xilinx FPGA part

    €110 (Avg Bid)
    €110 Gns Bud
    16 bud
    Task in VHDL Udløbet left

    i have a task related to Communication VHDL Xilinx, i will share the details in chat.

    €100 (Avg Bid)
    €100 Gns Bud
    19 bud