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    1,886 fpga project video jobs fundet, i prisklassen EUR

    Hi Freelancers, I have a project I've been working on for the past 2 months- an Altera FPGA control system for a specific application. Although I have knowledge in electrical engineering, I have no qualifications in the field, and thus I’d like a qualified individual to confirm my design, correct any mistakes I may have made, and possibly make the product

    €157 (Avg Bid)
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    2 bud

    Hello I'm looking for a talented FPGA developer who have rich knowledge of mining with several kinds of algorithms and also have experience with it. Looking forward honest developers. Thanks

    €18 / hr (Avg Bid)
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    6 bud

    ...looking for someone who can design a FPGA based X13bcd miner to mine X13bcd based coins like BCD. The design should be adaptable for possible changes in the X13bcd algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with reasonable

    €3793 (Avg Bid)
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    10 bud

    Hello freelancers! The goal of this project is to help us investigate hardware-efficient implementation of the Espresso stream cipher and to compare it to Grain-128 and Trivium in terms of area, delay, latency and power energy consumption so we can decide which suits us the best. Your tasks will include: • Investigating hardware optimization

    €174 (Avg Bid)
    €174 Gns Bud
    2 bud

    Bug-fix Mining App and FPGA-VHDL Project. You have to fix the mining App what is written in C and running on a Linux server. And fix on the FPGA side the PLL and add multicores.

    €488 (Avg Bid)
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    7 bud

    ...required knowledge would have to be 1) FPGA bitstreams development 2) Crypto mining software. 3) You MUST have at least one VCU1525 (VU9P Xilinx board) AVAILABLE to be able to develop the bitstream. You will have to use an exhisting open source crypto minign software, developed for GPUs and CPUs, and port it to the FPGA in a VERY EFFICIENT way Very efficient

    €9 (Avg Bid)
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    1 bud

    ...required knowledge would have to be 1) FPGA bitstreams development 2) Crypto mining software. 3) You MUST have at least one VCU1525 (VU9P Xilinx board) AVAILABLE to be able to develop the bitstream. You will have to use an exhisting open source crypto minign software, developed for GPUs and CPUs, and port it to the FPGA in a VERY EFFICIENT way Very efficient

    €1 / hr (Avg Bid)
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    1 bud

    ...have to be 1) FPGA bitstreams development 2) Crypto mining software. 3) You MUST have at least one VCU1525 (VU9P Xilinx board) AVAILABLE to be able to develop the bitstream. The crypto mining software, already exhisting, should be ported to the FPGA in a VERY efficient way. Very efficient means that the hashrate output of the FPGA, once developed

    €1 / hr (Avg Bid)
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    1 bud

    Merhaba, bizim bir projede FPGA mühendisine ihtiyacimiz var ve sizinle bu konuda görüsmek istiyorum.

    €9 (Avg Bid)
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    1 bud

    We are looking for developers/coders specialized in cryptos and blockchain for a project of firmware development. We would like to get a firmware to overclock this mining hardware i.e. graphic cards (GPU) RX580 8Go. Which are the maximum hashrates performances you can get?

    €1638 (Avg Bid)
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    5 bud

    Hi, We want to open a project regarding to a special camera module. The camera module should be selectable between area scan and line scan mode. The standard area scan sensors should also be driven as line scan sensor. We want to use standard cmos camera modules as RGB, mono with 2K and 4K horizantal resolutions. During line scan mode we need to reach

    €1 / hr (Avg Bid)
    €1 / hr Gns Bud
    1 bud

    Hi, We want to open a project regarding to a special camera module. The camera module should be selectable between area scan and line scan mode. The standard area scan sensors should also be driven as line scan sensor. We want to use standard cmos camera modules as RGB, mono with 2K and 4K horizantal resolutions. During line scan mode we need to reach

    €1 / hr (Avg Bid)
    €1 / hr Gns Bud
    1 bud

    Hi, We want to open a project regarding to a special camera module. The camera module should be selectable between area scan and line scan mode. The standard area scan sensors should also be driven as line scan sensor. We want to use standard cmos camera modules as RGB, mono with 2K and 4K horizantal resolutions. During line scan mode we need to reach

    €1 / hr (Avg Bid)
    €1 / hr Gns Bud
    1 bud

    Dear Muhammad, I am looking for an Hardware Engineer having experience with FPGA/ASIC in the Ethernet area. We want to build and develop a product and it looks that you would be able to do that. More details about the project I would share in the chat.

    €9 (Avg Bid)
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    1 bud

    Hi Ahmed M., As discussed find below points Change Request in UART2SPI project. 1. Instead of UART now data communication is on 3 wire. a. Clock b. Data c. Valid 2. Clock is 5MHz, data is of 8bit (1 byte), data should be read only when valid pin is high. ex:- For 256 bytes transmmission, first valid pin goes high , 256 bytes transmitted on data

    €97 (Avg Bid)
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    1 bud

    more details will be given in the chat only serious expert and my maximum budget for this task is $100

    €49 (Avg Bid)
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    24 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €909 (Avg Bid)
    €909 Gns Bud
    4 bud

    We require a PCB designer familiar with gerber files and PCI Express FPGA designs. We have a reference design and we require the design simplifying so the board only provides the functions required to run our software as effective as possible.

    €204 (Avg Bid)
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    11 bud
    Essay Writing Udløbet left

    Hardw...artificial neural networks, machine vision and other machine learning algorithms for robotics, internet of things and other data-intensive or sensor-driven tasks. • SW, GPU, FPGA, ASICs, Heterogeneous computing • Examples: • Virtual machines and environments for NN acceleration • Nvidia Volta/Tesla application for NN acceleration Es

    €48 (Avg Bid)
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    50 bud

    The task is to develop the implementation of the keccak256 algorithm for FPGA XILINX xcku035-1ffva1156c. Verilog / VHDL development language (Xilinx Vivado Design Suite) Functional check on any available board. Requirements for implementation: 1. The algorithm should work in accordance with [log ind for at se URL]; a. The source can

    €550 (Avg Bid)
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    3 bud

    ...for someone who can design a FPGA based x16r miner to mine Cuckoo Cycle based coins like rvn. The design should be adaptable for possible changes in the x16r algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with

    €5043 (Avg Bid)
    NDA
    €5043 Gns Bud
    17 bud
    find fpga projects Udløbet left

    Hi somebody needed for find fpga (verilog-vhdl) remote projects I paid 20% commission for each project

    €407 (Avg Bid)
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    10 bud

    Hi, I need a quick prototype for an Artix-7 based fpga that makes a pcie to sd card controller (SD host controller/SD bus). Objective is to have a fpga card (working on pcie screamer) recognized as a SD/MMC card reader under windows, I need Windows to recognize/be able to install the windows built-in sd card drivers for the card. I don’t need it

    €377 (Avg Bid)
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    3 bud

    Arduino that can record signal data and playback the data. it will be inline. I have a FPGA and an LCD. I need to record the signals coming from the FPGA to the LCD and recreate the signal to display on the LCD

    €47 (Avg Bid)
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    8 bud

    I would like a board designed in Altium Designer, KiCAD or Eagle that is PIN compatible with the ZYBO Z7-20 board from diligent, but has only the essential circuitry required for RAM, Power, Jtag, and the CSI camera. Please and thank you.

    €13 - €22 / hr
    €13 - €22 / hr
    0 bud

    I would like a board designed in Altium Designer, KiCAD or Eagle that is PIN compatible with the ZYBO Z7-20 board from diligent, but has only the essential circuitry required for RAM, Power, Jtag, and the CSI camera. Please and thank you.

    €520 (Avg Bid)
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    26 bud

    GIVE ME SOME IDEAS ABOUT PROJECTS USING FPGA BOARD I need some ideas(NEARLY 10) for my projects by using [log ind for at se URL] is an electronics and communication engineering project.I need some new ideas. Give me an example idea for accepting the [log ind for at se URL] should use only fpga and some sensors only.

    €1776 (Avg Bid)
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    9 bud

    Hello I'm looking for a talented FPGA developer who have rich knowledge of C/C++, Python I have a machine using Huawei's FPGA used vu9p core and I am going to port x13bcd hash algorithm to this machine And I want at least 300mh/s with x13bcd but will increase double using x16R I am using Ubuntu and you can check your project via remote Other details would

    €1050 (Avg Bid)
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    14 bud
    fpga image fusion Udløbet left

    i want you to do project for medical image fusion of CT scan and MRI using xilinix fpga

    €215 (Avg Bid)
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    7 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €10431 (Avg Bid)
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    2 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €9139 (Avg Bid)
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    1 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €786 - €793
    €786 - €793
    0 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €776 - €777
    €776 - €777
    0 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €778 - €778
    €778 - €778
    0 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €788 (Avg Bid)
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    3 bud

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    €647 - €777
    €647 - €777
    0 bud

    ...XC7A50T-2FTG256I, FT601Q, AD9361BBCZ, TPS2069C-DBV, LM2832XMY, N25Q256A13EF840E, IS66WVH8M8ALL-166B1LI, SN74LVC2G17.. Since the project is done in Altium, I need someone who master Altium Designer to connect a new EXP main connector to the FPGA. Some nets may be missing in schematics, you should manually add the net names to the schematics. Although the schematic

    €158 (Avg Bid)
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    27 bud

    Hello, I have a set of ECG signal values in numeric form, I want to display them through Xlinx code and sen...through Xlinx code and send the same signal to network device through wifi. Please let me know if you can do it in 2 days. The code will not run on actual FPGA board, its just a simulation project. The code should run on xilinx ise software.

    €105 (Avg Bid)
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    2 bud

    FPGA XC6SLX25, Power source 12v. Connect PROM(at least 2 megabyte) and RAM(at least 100kilobyte) to FPGA and power

    €48 (Avg Bid)
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    6 bud
    FPGA project Udløbet left

    i need someone to take a FPGA and make it compatible with a MIPI LCD.

    €200 (Avg Bid)
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    2 bud
    FPGA load Flash Udløbet left

    loading a Xilinx SPI flash from external serial source using FPGA

    €317 (Avg Bid)
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    3 bud

    ...DE10-Nano board from Terasic. I am trying to changing the FPGA code DE10-Nano board to add our H/W interface to it. I have trouble to get the correct starting point for the FPGA that will be used with Linux. If you are expert with this board, please help us to provide support to us. Who am I: I am a FPGA design expert, but know nothing about DE10-Nano. I

    €24 / hr (Avg Bid)
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    9 bud
    VHDL FPGA Project Udløbet left

    This Project focuses on the use of VHDL language to describe a simple design and to verify its correct operation through test benches and simulations. The implementation on a specific FPGA has to allow also to obtain additional information of consumption, frequency of operation, etc. In short, it is a matter of following a design process as close to

    €651 (Avg Bid)
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    6 bud

    i already have the 90% of the code just need to finish 10% and guide me on running the code my my board

    €61 (Avg Bid)
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    8 bud

    this is fairly a simple project let make now if you ca do it i will attach files read that the budget is also good $200 and i need it asap

    €91 (Avg Bid)
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    8 bud

    this is fairly a simple project let make now if you ca do it i will attach files read that the budget is also good $200 and i need it asap

    €128 (Avg Bid)
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    8 bud

    ...given two 256*256 synthesized & one SAR real time image. Implementation should be done in Matlab@Simulink and Xilinx@ System Generator environment. Implement above algorithm on FPGA Board & GPU. Simulation results should be demonstrated on MATLAB by comparing MATLAB result with Xilinx@ System Generator result for above specified 3 images with different

    €123 (Avg Bid)
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    2 bud

    VHDL implemented in altera de2 board

    €295 (Avg Bid)
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    5 bud