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    2,801 fpga project verilog jobs fundet, i prisklassen EUR
    Verilog project FSM Udløbet left

    Verilog project FSM Verilog project FSM Verilog project FSM

    €10 / hr (Avg Bid)
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    1 bud

    Hey, I have a project that needs to be done in Verilog and Vivado and I'll share details to anyone interested.

    €22 (Avg Bid)
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    8 bud
    Verilog Task on Nexys 4 board 5 dage left
    VERIFICERET

    Just need to design the Snake Gane as per my specifications. I am using Nexys 4 development board.

    €51 (Avg Bid)
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    ...connected to a PHY(PMA) IP, encoding the data with 8b10 protocol and then transmitting (no receiving) the data out through the PMA, 5Gbps. The data will be received by a Xilinx FPGA GTH Transceiver and then decoded. Therefore the PCS logics shall be compatible with the GTH Transceiver. Your tasks are 1. Write the PCS RTL code 2. Provide a compatible GTH

    €50 / hr (Avg Bid)
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    9 bud

    Design and development of non-invasive medical electronics devices that support and ...electronics devices that support and aid medical professionals in data acquisition and communication with expertise on processor/operating system/testing/system validation, FPGA design, integration of medical sensors, porting, middleware and application development.

    €652 (Avg Bid)
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    4 bud

    Hi Loi L., I noticed your profile and would like to offer you my project. =================== The details : - my profile : fpga hobbyist newbie / singapore / currently working in a non-technology industry - hardware : - board : DE10-Lite MAX10 10M50DAF484C7G - monitor : HP Compaq LA2205wg, VGA mode 1680x1050-60Hz - OS : Linux distro (Linux

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    1 bud

    i have attached the document below. And i need this on 21st of october.

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    ...developing a transmitter with digital modulation schemes with shorter delivery time. We developed all the algorithms required in LabVIEW FPGA. The same have to be ported to VHDL and be integrated before programming the Xilinx V6 FPGA on the transmitter. Complete hardware and many of the software blocks in VHDL are already built by our team. The requirement is

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    Lokal
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    Need an expert in xilinx vivado Projects are based on digital systems on topics such as Multiplexers Flip flops registers Counters Clock dividers Please contact for project instructions and further details

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    9 bud

    I have my working model of neural network. I want to develop an accelerator on FPGA and show improvement in power.

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    28 bud

    ...Video Production Landscape Design Online Writing Financial Analysis Drafting Package Design User Experience Design Moving Swift Autodesk Inventor Tattoo Design Call Center FPGA Handyman Microsoft SQL Server Digital Marketing Wikipedia Zbrush Carpentry Book Artist Procurement Database Development Raspberry Pi Wix VB.NET Sketching Email Developer Network

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    Fremhævet
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    Snake Game : 1.) Should run on Altera DE2 Board or on basy3 . 2.) Should Support VGA. 3.)Needed in a 3 days. skills:- verilog software:vivado i need this project in verilog and not in VHDL

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    Task on verilog 3 bit ALU Deadline 1 day Amount USD 40

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    Need a small task on 3 bit ALU using verilog. Deadline 18 hours amount usd 30 .

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    We are looking for someone who is very good with high speed digital layouts. The application is an Ethernet to digital audio motherboard. A daughter card with an Zynq FPGA/processor will install on this motherboard, and the motherboard will install onto a DAC board. There is a development board for this daughter card already. So this motherboard will

    €1571 (Avg Bid)
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    18 bud
    Labview MyRIO2 Udløbet left

    Hi All, I have a project for someone who is expert in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes

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    3 bud
    Distance using FPGA Udløbet left

    I work in the Electrical Engineering Field. The project is to create a distance measuring program using verilog. I will be using Basys 3 ( FPGA) and an Ultrasonic sensor ( HC-SR04). The idea is to measure the gap between two vehicles. The sensor will be placed in the front of a toy car and used to measure the gap instantaneously and also save that data

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    I would like to discuss with freelancers having strong expertise in programming languages like VHDL, Verilog, Matlab, embedded C Please reach out to me. Engineering B.Tech. is must

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    30 bud

    I need someone to modify the ccminer software. So it can communicate with FPGAs instead GPUs. It needs to work with both usb and pcie. I'm not asking for algorithm programming, I'm not asking for bitstreams. Just modifying the mining app ccminer so it works with FPGAs.

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    I have project ready already just need some help!

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    9 bud

    Hi guys, I've done a simple design to test the SRAM of Digilent Cmod A7 FPGA board. This is how it works: Using a terminal through UART, I send the input data and address to the SRAM. Then I send address where to read, and I get back the data previously written. Everything works OK except the controller. I need someone to review my design and fix

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    FPGA craze Udløbet left

    coding of bitstreams, software licensing, imbedded commission

    €2070 (Avg Bid)
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    18 bud

    Hi All, I have a project for someone who is expert in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes

    €124 (Avg Bid)
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    8 bud

    Any encryption code (AES/RSA) written in VHDL/Verilog in Quartus II for fpga board stratix IV. Please contact for more details.

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    Project target is to have a FPGA to communicate with two I2S codecs and to provide a SPI slave connection conveying the I2S data to and from a local MCU. Testing scripts and test timings for the Altera Quartus environment are required. For the proper testing of the project deliverables, test scripts and test timings need to be created and relevant

    €184 (Avg Bid)
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    3 bud

    Hi All, I have a project for someone who is expert in using MyRIO, MyRIO FPGA and MyRIO web services (Fig1 and 2). The project steps are explained as below: 1- The MyRIO should capture a signal (can be anything) with the sampling frequency of 5KHz. 2- Eleven (11) seconds of the signal must be captured. 3- I will provide you with two (2) MATLAB codes

    €133 (Avg Bid)
    €133 Gns Bud
    4 bud

    we need a technical content writer who knows the system Verilog, OVM and UVM.

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    7 bud

    This is pavan. I am from the VLSI industry. I need a technical writer to explain 3 subjects(digital electronics, Verilog, and VHDL).

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    17 bud

    ...trying to make a project but I haven't purchased a board yet because I'm not sure which board to buy. So far, I've looked at the Zybo-Z7 or Arty-Z7. You will need to have these boards already obviously to complete this project. They both have sample projects for HDMI in and HDMI out. What I'm trying to accomplish is have: 1) PC->HDMI->FPGA->HD...

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    We are looking for C++ programmer with experience in building GUI using QT. Preferable EDA/ Verilog Experience with background in Electrical Engineering

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    We are looking for DSP Firmware Engineer who has specialized in algorithms' performance optimization for DSP/FPGA based on VLIW architecture.

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    Please refer the attached document. This is the base paper of my project. I want to do my project on 64 bit square root carry select adder. I request you to help me with the coding in Verilog using Xilinx in gate level or switch level modelling. Can you please share the cost and the time line for the code. I will need it as soon as possible.

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    Video converter Udløbet left

    I am looking to create hardware that will convert HDMI to NDI (Network Device Interface) I need both hardware and [log ind for at se URL] is no set date when I need this by but w...HDMI to NDI (Network Device Interface) I need both hardware and [log ind for at se URL] is no set date when I need this by but would like it soon. There is an sdk for the conversion by fpga.

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    ...sent out of the FPGA chip through a single pin... Part 2 ...The serial transmission from part 1 is captured and converted to parallel data before being stored in another memory location( as 16 locations of 8-bits). The data in this memory should match with the data in memory in Part 1. Both parts are to be implemented in the same FPGA ....The serial

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    I am building a tech blog about FPGA crypto mining. I need someone able to write tech articles, based on my request, about FPGA crypto mining. This is NOT something you can search on google and learn and write. Requirements: 1) You MUST have VERY GOOD knowledge about FPGAs 2) You MUST have VERY GOOD knowledge about crypto mining 3) You MUST be english/american

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    I have a DE1-SoC FPGA board. I need an image build with a Linux installation (doesn't really matter) and the linux-socfpga kernel; however, the device tree blob on the installation must recognize the onboard FPGA peripherals, especially the onboard ADC. The goal is to have a working Linux image file, which when burned to an SD card would load Linux

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    Read data sensor Udløbet left

    Read data of sensor on FPGA Xillinx. More details via messenger Freelancer.com with full requirements.

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    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

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    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €130 (Avg Bid)
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    The aim of the project is to design a BIST controller to insert and detect the faults (defect) like Read disturbance, Erase disturbance, Program disturbance, SAF, TF, ADF, CFs, TF, NPSF, Retention fault in FLASH memory by using BIST algorithm like March algorithm using verilog or VHDL in Xilinx or Modelsim. Need Simulation waveforms for the same.

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    Needs to hire 2 Freelancers We are looking for designer to design Video object tracking : 1- CPU, CUDA based or FPGA accelerated algorithm . 2- Multi-target Detection/ tracking . 3- Moving object detection . 4- High accuracy , auto scaling , occlusion recovering . 5- fixed camera or moving camera. 6- Image Stabilization . 7- Move on Move tracking

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    Diseñar un procesador que configure el SPI con el módulo nrf24l01, y luego mandar mensajes en radio frecuencia entre dos módulos nrf24l01

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    Diseñar un procesador que configure el SPI con el módulo nrf24l01, y luego mandar mensajes en radio frecuencia entre dos módulos nrf24l01

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    DSP48E1 help Udløbet left

    Hi! I need some help with DSP48E1 verilog instantiation.

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    We are looking for someone with engineering background, preferably knowledge in FPGA related stuff to translate some tehnical documents. Google translate is not acceptable.

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    Looking for a mentor in advanced FPGA development using Altera Max 10 FPGA board specifically.

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    1. Identify a good value and properly sized CPLD/FPGA and toolset (toolset needs to be relatively easy to configure) to accommodate the required functionality. 2. Develop the CPLD/FPGA code. The device needs to take as inputs a set of states (from a microcontroller so either as an I2C command or as a 3 digital input code, along with 3 digital inputs

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    I need a network of thermostats that send data over Power Line Communication to a router where it is then sent ov...consulting for the design and components to use for both the thermostats and the modem/router as well as software to access and display the data for a plug and play system. Project will have to use Power Line Communication specifically.

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    I want clients Udløbet left

    I need some help with selling my services. I am verilog/ matlab coder and I need customers . you find me a client , I write his/her code and you get paid %30 of the project budget

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    PCB design Udløbet left

    ...square or rectangular with maximum dimensions of 9.5 cm x 9.5 cm. The PCB should hold 5 of the following boards: [log ind for at se URL] There should be some minimal interconnection between the 5 boards (more details to be provided). The USB ports on each of the boards will be used only for programming

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