VLSI Engineers klar til at blive ansat

  • Very-large-scale integration (VLSI)
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Showing 6 results
  • Hire     Diyanm
Hire     Diyanm

    Diyanm Diyanm

    India $4 USD / hour
    Diya Nilesh Munjal.
    India
    I am CA Inter. Having 7 years of experience in accountancy. Complete knowledge of accounts fnalization & gst. I am specialized in Handling Book keeping, graphic designing & E-commerce product cataloging. I have a experience of Product listing & administrative work of Amazon Seller Central for more than 8 years. I was...
    I am CA Inter. Having 7 years of experience in accountancy. Complete knowledge of accounts fnalization & gst. I am specialized in Handling Book keeping, graphic designing & E-commerce product cataloging. I have a experience of Product listing & administrative work of Amazon Seller Central for more than 8 years. I was also a seller at E-commerce for 3 years. I also have e-commerce clients. I also possess expertise in Amazon API. I am also having experience in listing with HTML TAG and using SEO keywords using HELLIUM 10 SOFTWARE I am specialised in preparing excel macros for any kind of queries. I am passionate about my work & I meet the deadlines on time. I am Hardworking & disciplined towards my job roles and I always look up to challenging new things. mindre
  • Hire Diyanm
  • Hire     piyushpatil98
Hire     piyushpatil98

    piyushpatil98 piyushpatil98

    India $2 USD / hour
    HDL Designer, Matlab Coder, DSP, VLSI, CMOS.
    India
    Cleared JEE Advance All India Rank 2300. Electrical Engineer From IIT. Experience in Verilog HDL. Worked on projects in Digital VLSI architectures, CMOS analog IC design (Cadence Virtuoso). Worked on Matlab (Majorly in signal processing domain). Electrical Engineering 3rd year undergraduate. Hard working electronics...
    Cleared JEE Advance All India Rank 2300. Electrical Engineer From IIT. Experience in Verilog HDL. Worked on projects in Digital VLSI architectures, CMOS analog IC design (Cadence Virtuoso). Worked on Matlab (Majorly in signal processing domain). Electrical Engineering 3rd year undergraduate. Hard working electronics enthusiast. Worked on Arduino on numerous project. Link to resume: https://drive.google.com/file/d/1gvvx-m42UX2a4V_4SNba4jeJJTfj7AUP/view?usp=sharing mindre
  • Hire piyushpatil98
  • Hire     teamfpga
Hire     teamfpga

    teamfpga teamfpga

    Vietnam $50 USD / hour
    Physical Design Engineer at Realtek Viet Nam
    Vietnam
    2.2
    1 bedømmelse 1 bedømmelse $50 USD pr. time
    + PHYSICAL DESIGN in VLSI field • Good knowledge of physical design implementation, strategies and static timing analysis • Good understanding and hands on experience with physical verification (DRC/LVS/ERC/Antenna) • Good knowledge of EDA tools from Synopsys (ICC, ICC2, DC, FM, Prime Time), Cadence (EDI, INNOVUS RTL...
    + PHYSICAL DESIGN in VLSI field • Good knowledge of physical design implementation, strategies and static timing analysis • Good understanding and hands on experience with physical verification (DRC/LVS/ERC/Antenna) • Good knowledge of EDA tools from Synopsys (ICC, ICC2, DC, FM, Prime Time), Cadence (EDI, INNOVUS RTL Compiler, GENUS ) and Mentor (Calibre) , particularly with EDI, INNOVUS , FM, RC , PT, Calibre • Power analysis EM/IR (Redhawk apache) • Good knowledge of Linux, C shell, C programming, TCL , Verilog HDL • Technology used: TSMC 90nm --> 28nm + Memory Layout Engineer • Engaged in doing analog layout blocks in DDR4 design in TSMC 45nm • Responsible for LVDS layout design in TSMC 28nm • Responsible for layout of analog, mixed-signal blocks in XMC 65nm • Engaged in doing standard cell design and analog design layout in TSMC 65nm • Responsible for layout design of Dual Transfer Rate (DTR) IO cells in XMC 65nm • Verified EMIR effect for DTR PHY design • Implemented LEF file generation and DEF file import for digital block and other blocks • Leading layout for 128M XiP chip • Completed tape-outs for 32M/64M eXecute-in-Place (XiP) chips in XMC 65nm • Training and managing a layout of 6 members • Studying new 5nm process • Doing QA, QCS for all layout views of memory instances • Doing layout all types of memory leafcells in TSMC 7nm + FPGA expertise : Expert in Vivado,PlanAhead, ModelSim, ISim, XST, Project Navigator, SDK, Xilinx, Altera Software to Simulate and Implement VHDL Projects. mindre
  • Hire teamfpga
  • Hire     raulbehl
Hire     raulbehl

    raulbehl raulbehl

    India $25 USD / hour
    Hardware Engineer | Computer Architecture Expert
    India
    0.8
    1 bedømmelse 1 bedømmelse $25 USD pr. time
    I am currently working as a Design and Verification engineer at a leading Processor Development firm. My skills set include: i) Matlab/LabView/Logisim ii) Engineering Mathematics iii) Assembly (ARM, MIPS, PLP, x86, MARIE and pep/8) / Computer Architecture iv) Verilog/System Verilog/UVM v) Raspberry...
    I am currently working as a Design and Verification engineer at a leading Processor Development firm. My skills set include: i) Matlab/LabView/Logisim ii) Engineering Mathematics iii) Assembly (ARM, MIPS, PLP, x86, MARIE and pep/8) / Computer Architecture iv) Verilog/System Verilog/UVM v) Raspberry Pi/Arduino/TMS320C5535 eZdsp/TM4C123 vi) PSpice vii) C/C++, Qt, Python viii) Perl Happy to help! :-) mindre
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  • Hire     lavanyaanjee
Hire     lavanyaanjee

    lavanyaanjee lavanyaanjee

    India $100 USD / hour
    Analog circuit designer
    India
    0.4
    1 bedømmelse 1 bedømmelse $100 USD pr. time
    Six months of experience in VLSI Industry as an Analog Circuit Design Engineer. Good understanding of corner cases in circuit design. Good knowledge of BGR design. Good understanding of circuits such as ADC, DAC.
    Six months of experience in VLSI Industry as an Analog Circuit Design Engineer. Good understanding of corner cases in circuit design. Good knowledge of BGR design. Good understanding of circuits such as ADC, DAC. mindre
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  • Hire     vlsirajagopal
Hire     vlsirajagopal

    vlsirajagopal vlsirajagopal

    India $15 USD / hour
    8 yrs exp in RTL FPGA Design & Verification
    India
    Verilog , VHDL, System verilog, UVM. Synopsys VCS, VIVADO,MODELSIM,XILINX ISE, Design vision (Design compiler) , Prime time,TMAX Would like to work on my skills.
    Verilog , VHDL, System verilog, UVM. Synopsys VCS, VIVADO,MODELSIM,XILINX ISE, Design vision (Design compiler) , Prime time,TMAX Would like to work on my skills. mindre
  • Hire vlsirajagopal

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